TMS320DM6441 datasheet(5/232 Pages) TI

5 / 232 page

1.3 Functional Block Diagram

JTAGInterface

SystemControl

PLLs/Clock

Generator

Input

Clock(s)

Power/Sleep

Controller

Multiplexing

ARMSubsystem

ARM926EJ-SCPU

16KB

I-Cache

16KBRAM

8KB

D-Cache

16KBROM

DSP Subsystem

C64x+

DSP CPU

32KB

L1Pgm

64KBL2RAM

80KB

L1Data

Video-Imaging

Coprocessor(VICP)

BT.656,

Y/C,

Raw(Bayer)

VideoProcessingSubsystem(VPSS)

CCD

Controller

Video

Interface

FrontEnd

Resizer

Histogram/

Preview

10bDAC

On-Screen

Display

(OSD)

Video

Encoder

(VENC)

10bDAC

BackEnd

8bBT.656,

Y/C,

24bRGB

NTSC/

PAL,

S-Video,

RGB,

YPbPr

SwitchedCentralResource(SCR)

Peripherals

EDMA

Audio

Serial

Port

I2C

SPI

UART

SerialInterfaces

DDR2

MemCtlr

(16b/32b)

AsyncEMIF/

NAND/

SmartMedia

ATA/

Compact

Flash

MMC/

SD/

SDIO

Program/DataStorage

Watchdog

Timer

PWM

System

General-

Purpose

Timer

USB2.0

PHY

VLYNQ

EMAC

With

MDIO

Connectivity

M.S./

M.S.PRO

HPI

TMS320DM6441

Digital Media System-on-Chip

www.ti.com

SPRS359D – SEPTEMBER 2006 – REVISED MARCH 2008

Figure 1-1 shows the functional block diagram of the device.

Figure 1-1. TMS320DM6441 Functional Block Diagram

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Digital Media System-on-Chip (DMSoC)

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