TMS320DM6441 datasheet(63/232 Pages) TI

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4.3.2

ARM Boot

4.3.3

DSP Boot

TMS320DM6441

Digital Media System-on-Chip

www.ti.com

SPRS359D – SEPTEMBER 2006 – REVISED MARCH 2008

The DM6441 ARM can boot from EMIFA, internal ROM (NAND) or UART0 as determined by the setting of

the BTSEL[1:0] pins. The BTSEL[1:0] pins are read by the ARM ROM boot loader (RBL) to further define

the ROM boot mode. The ARM boot modes are summarized in Table 4-6.

Table 4-6. ARM Boot Modes

BTSEL1

BTSEL0

Boot Mode

ARM Reset

Brief Description

Vector

ARM NAND RBL

0x0000 4000

Up to 14 K-bytes secondary boot loader through NAND with up

to 2 K-bytes page sizes.

ARM EMIFA external Boot

0x0200 0000

EMIFA EM_CS2 external memory space.

ARM HPI RBL

0x0000 4000

Up to 14 K-btyes secondary boot loader through an external

host.

ARM UART RBL

0x0000 4000

Up to 14 K-bytes secondary boot loader through UART0.

When the BTSEL[1:0] pins are set to the ARM EMIFA external boot ("01"), the ARM immediately begins

executing code from the EMIFA EM_CS2 memory space (0x0200 0000). When the BTSEL[1:0] pins

indicate a condition other than the ARM EMIFA external boot (!01), the RBL begins execution.

ARM NAND boot mode has the following features:

• Loads a secondary user boot loader (UBL) from NAND flash to ARM internal RAM (AIM) and transfers

control to the user software.

• Support for NAND with page sizes up to 2048 bytes.

• Support for error correction when loading UBL

• Support for up to 14KB UBL

• Optional, user selectable, support for use of DMA, I-cache, and PLL enable while loading UBL

ARM UART boot mode has the following features:

• Loads a secondary UBL via UART0 to AIM and transfers control to the user software.

• Support for up to 14KB UBL

ARM HPI boot mode has the following features:

• No support for a full firmware boot. Instead, waits for external host ot load a secondary UBL via HPI to

AIM and transfers control to the user software.

• Support for up to 14KB UBL.

For further details on the ROM bootloader, refer to the ARM Subsystem Users Guide.

For C64x+ booting, the state of the DSP_BT pin is sampled at reset. If DSP_BT is low, the ARM will be

the master of C64x+ and control booting (host-boot mode). If DSP_BT is high, the C64x+ will boot itself

coming out of device reset (self-boot mode). Table 4-7 shows a summary of the DSP boot modes.

Table 4-7. DSP Boot Modes

DSP_BT

DSP

ARM

DSPBOOTADDR

Brief Description

Boot Mode

Host boot

Internal boot

Programmable

ARM sets an internal DSP memory location in DSPBOOTADDR

internal DSP memory through DMA prior to releasing DSP reset.

Host boot

External boot

Programmable

ARM sets an external DSP memory location in DSPBOOTADDR

releasing DSP reset.

Self boot

Any, except HPI

0x4220 0000

Default EMIFA base address

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