TMS37157 datasheet(28/47 Pages) TI

28 / 47 page

WRITE

AD DRESS

CHARGE

Charge…..

010110

Page 26

LSB

MSB

CLK

LEN

SIMO

CMD

DATA

SOMI

DATA

BUSY

TMS37157

SWRS083A – SEPTEMBER 2009 – REVISED NOVEMBER 2009

www.ti.com

Write Data Format

The write data format of the Battery Charge Command is shown in Figure 19.

Figure 19. Battery Charge Write Command

SPI COMMANDS

The serial interface for communication between a Microcontroller and the TMS37157 is a synchronous SPI

interface which uses clock and data lines to transfer data in bytes. The Microcontroller can use its on-chip

hardware USART to implement this interface protocol, which allows efficient Microcontroller operation and

simplifies software development. The USART should be used in synchronous SPI (Serial Peripheral Interface)

mode, with the Microcontroller designated as the master for all bi-directional communications.

The TMS37157 uses a 3 wire SPI Communication Interface (SIMO, SOMI, CLK). No Enable is necessary. For

Synchronization the BUSY Output of the TMS37157 can be used.

SPI Communication Structure

SPI communications can only be initiated by the Microcontroller if the TMS37157 is ready to receive. This is

indicated by a low level on the BUSY line – when the first byte is received via the SIMO line, BUSY goes high. A

short BUSY low pulse confirms that a byte has been correctly received. After this low pulse, the next byte of the

protocol can be sent. If the SPI command requires it, the TMS37157 will then send byte-wise response data via

the SOMI line. Each byte sent by the TMS37157 will be confirmed by a short BUSY low pulse. After successful

communication, the BUSY line will go from high to low after the last transferred byte and remain low (see

Figure 20).

Figure 20. SPI Communication

The initial rising of the busy line happens latest after the 3rd rising edge of the SPI Clock. This indicates that the

Front End starts to process the incoming data. It remains high until the Front End is ready with processing of the

8-bit data. After this a low busy pulse (min 30

μs, typ.50 μs, max. 70 μs) indicates to the Microcontroller that the

next data can be sent.

The time the busy line stays high varies depending on the operations the Front End has to perform. The

maximum duration is 30ms after all bytes on the SIMO are received. Sending out data on SOMI line depends

mainly on the speed of the SPI-Clock. The next SPI Data must be sent within tBusyhigh=10ms. If the next data is

not applied within tBusyhigh the SPI command is interrupted.

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