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Preliminary
8-127
RF2461
Rev A13 010607
8
*The bias circuitry current drop when LO signal is not present. Total LO buffer/bias circuitry current is 7 mA when LO sig-
nal is present.
Pin
Function
Description
Interface Schematic
15
IF2+
First differential output pin for the second mixer. Open collector. A cur-
rent combiner external network performs a differential to single-ended
conversion and sets the output impedance. A DC blocking cap must be
present if the IF filter input has a DC path to ground. Mixer (IF2+ and
IF2-) needs to “see” a differential impedance between 2k
Ω to 4kΩ.
16
VCC2
VCC pin for the LO buffer/bias circuitry.*
17
LO IN
LO limiter input pin.
18
ENABLE
This pin is used to enable or disable the RF2461. A logic high (> 2.0V)
enables the circuitry. A logic low (<1.0V) disables the circuitry.
19
IP SET
Controls the setting of the LNA current. A logic low (< 1.0V) selects the
internal resistance (49.5k
Ω), resulting in an LNA current of 5mA. A
logic high (> 2.0V) selects the external resistance at pin 8.
20
IF SEL
Determines which IF port is active. A logic low (< 1.0V) activates IF1
and deactivates IF2. A logic high (> 2.0V) activates IF2 and deactivates
IF1.
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with mul-
tiple vias.
IF2-
IF2+
LO IN
ENABLE
IP SET
IF SEL
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