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Preliminary
7-44
RF2689
Rev A4 010815
7
Pin
Function
Description
Interface Schematic
1VGC1
Analog gain control. Valid control voltage ranges are form 0.5V to 2.5V.
These voltages are valid with a 10k
Ω resistor in series with GC pin.
2GSM IN+
GSM IF balanced input. Input internally DC-biased.
3GSM IN-
Same as pin 2.
4
W-CDMA
IN+
W-CDMA IF balanced input. Input internally DC-biased.
5
W-CDMA
IN-
Same as pin 4.
See pin 4.
6VCC
Supply
7MODE A
DCS/GSM/GSM RX/W-CDMA mode selection.
8LO
LO input pin. Input internally DC-biased.
9MODE B
Warm-up mode enable. The input LO buffers and divider chains are
enabled.
10
EN RX
Chip enable.
11
Q OUT-
Complementary output to Q OUT+.
12
Q OUT+
Balanced baseband output.
13
I OUT-
Complementary output to I OUT+.
14
I OUT+
Balanced baseband output.
15
CALEN
Calibration enable.
16
FCLK
FCLK clock reference for the automatic calibration circuitry.
17
IF-
Complementary output to IF+.
18
IF+
IF test point output.
19
VREF2V
2V voltage reference decouple.
20
VGC2
Gain control decouple.
Pkg
Base
Die
Flag
Ground.
1200
Ω
1200
Ω
W-CDMA IN+
BIAS
BIAS
W-CDMA IN-
150
µA
QOUT-
QOUT+
V
CC
V
CC
150
µA
150
µA
IOUT-
IOUT+
150
µA
V
CC
V
CC
20 k
Ω
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