EP3C40 datasheet(17/34 Pages) ALTERA

17 / 34 page

Chapter 1: Cyclone III Device Data Sheet

1–17

Switching Characteristics

Altera Corporation

Cyclone III Device Handbook, Volume 2

Embedded Multiplier Specifications

Table 1–21 describes the embedded multiplier specifications for Cyclone III devices.

Memory Block Specifications

Table 1–22 describes the M9K memory block specifications for Cyclone III devices.

Configuration and JTAG Specifications

Table 1–23 lists the configuration mode specifications for Cyclone III devices.

Table 1–24 lists the active configuration mode specifications for Cyclone III devices.

Table 1–21. Cyclone III Devices Embedded Multiplier Specifications

Mode

Resources Used

Performance

Unit

Number of Multipliers

C7, I7, A7

9×9-bit

multiplier

340

300

260

MHz

18 × 18-bit

multiplier

287

250

200

MHz

Table 1–22. Cyclone III Devices Memory Block Performance Specifications

Memory

Mode

Resources Used

Performance

LEs

M9K

Memory

C7, I7, A7

Unit

M9K Block

FIFO 256 × 36

315

274

238

MHz

Single-port 256 × 36

315

274

238

MHz

Simple dual-port 256 × 36 CLK

315

274

238

MHz

True dual port 512 × 18 single CLK

315

274

238

MHz

Table 1–23. Cyclone III Devices Configuration Mode Specifications

Programming Mode

DCLK F

max

Unit

Passive Serial (PS)

133

MHz

Fast Passive Parallel (FPP) (1)

100

MHz

Note to Table 1–23:

(1) EP3C40 and smaller density members support 133 MHz.

Table 1–24. Cyclone III Devices Active Configuration Mode Specifications

Programming Mode

DCLK Range

Unit

Active Parallel (AP)

20 – 40

MHz

Active Serial (AS)

20 – 40

MHz

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