LM8322 datasheet(19/42 Pages) NSC

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FIGURE 13. PWM Timer

The period counter is a free running 8-bit up-counter which

starts counting when the script command file issues the first

RAMP command. An END command stops the period

counter.

The duty cycle of the PWM output is controlled by the ramp

counter. If the PWM period counter is active, the PWM output

signal is asserted while the period counter has a value less

than or equal to the value of the ramp counter.

The ramp counter can increment or decrement at a rate con-

trolled by the prescaler and step time counter. The prescaler

selects a factor of 16 or 512 for dividing down the frequency

of the 32.768 kHz clock. The ramp counter saturates at either

0x00 or 0xFF depending on the ramp direction.

The number of increment or decrement steps is specified by

the INCREMENT field of the RAMP command, which is load-

ed into the step counter. Even if the ramp counter hits its

saturation value, the requested number of steps will be per-

formed. An option enables assertion of the IRQ output to the

host after the last step is performed.

14.3 PWM SCRIPT COMMANDS

Table 8 summarizes the script commands.

TABLE 8. PWM Script Commands

Command

RAMP

PRES

CALE

STEPTIME

SIGN

INCREMENT

SET_PWM

PWMVALUE

GO_TO_

START

BRANCH

LOOPCOUNT

ADDRESS

END

RESET

TRIGGER

WAITTRIGGER

SENDTRIGGER

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