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PCA88021 Datasheet(PDF) 23 Page - NXP Semiconductors |
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PCA88021 Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 34 page ![]() PCA8802_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 19 February 2009 23 of 34 NXP Semiconductors PCA8802 Smartcard RTC 13. Bare die information 13.1 Locations [1] All coordinates are referenced, in µm, to the center of the die (see Figure 30 and Figure 31). [2] The substrate (rear side of the die) is wired to VSS but should not be electrically connected. [3] Die size before dicing. Final dimensions will be 10 µm to 20 µm smaller. 13.2 PCB or foil landing site The layout of the landing sites is important. It is recommended to follow the following guidelines 1. All landing sites should be the same size. When one site has a different size or shape, e.g. to indicate pad one, then the pull on the die produced by the surface tension of the solder will be different in one place. This variation can lead to the die not laying flat on the Printed-Circuit Board (PCB) or foil. This can also result in weak solder joints for some pins. 2. It is recommended to use circular landing sites of the same diameter as the solder ball. This will help with self alignment. Solder bump dimensions may be found in Figure 30. Table 13. Bump and reference point locations Symbol Pad Coordinates[1] x y INT 1 437 −396 VDD 2 −12 −430 TEST 3 −460 −396 OSCO 4 −460 1 OSCI 5 −460 396 VSS[2] 6 −12 430 SCL 7 437 396 SDA 8 437 1 pin 1 identifier - 474.7 −472.0 bottom left die corner[3] - −594.8 −568.2 top right die corner[3] - 594.7 568.3 Pin 1 is identified by this symbol. Fig 28. Pin 1 identifier 001aaj154 REF |
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