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PCA88021 Datasheet(PDF) 5 Page - NXP Semiconductors

Part # PCA88021
Description  ultra low power oscillator with integrated counter for initiating one time password generation
PDF  34 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA88021 Datasheet(HTML) 5 Page - NXP Semiconductors

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PCA8802_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 19 February 2009
5 of 34
NXP Semiconductors
PCA8802
Smartcard RTC
9.
Functional description
The PCA8802 is an ultra low power device for battery operations. The integrated oscillator
circuit generates a 1
⁄
32 Hz clock signal to increment a 24 bit counter. The communication
between the PCA8802 and other devices is made via an I2C-bus.
The device is always running but for longer storage time it can be switched off and on
again in case of delivery.
The functions of the device can be controlled with the following instruction set:
9.1 Oscillator
The 32.768 kHz oscillator includes two integrated load capacitors and an automatic gain
control to ensure a reliable start-up.
For prototype development and system debugging, it is possible to output a 32.768 kHz
square wave on the INT pin with the 32k_cmd instruction.
9.1.1 Power-on
At initial power-on, when the oscillator has not yet started, a reset will be generated.
During this state the serial interface will not respond when accessed. To ensure that the
oscillator has started and the serial interface is accessible, it is recommended that the
master attempts to make write-read accesses to the counter register.
Table 4.
Instruction set overview
Instruction
Description
Reference
wrt_cmd
device write access
Section 9.6.2
dvs_cmd
divider start or stop switch
Section 9.6.3
pwd_cmd
low power mode switch
Section 9.6.4
32k_cmd
32.768 kHz clock signal on the pin INT switch
Section 9.6.5
fst_cmd
fast system development mode switch
Section 9.6.6
set_cmd
set counter instruction
Section 9.6.7
rd_cmd
counter read instruction
Section 9.6.8
Exit from Power-down mode will give the same behavior as start-up.
Fig 5.
Power-on reset
001aaj166
oscillation now stable
oscillation
instructions will be ignored
VDD
instructions will be accepted
t



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