L7200 datasheet(28/91 Pages) INTEL

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Electrical Specifications

Datasheet

3.8

CMOS Signals

CMOS input signals are shown in Table 4. Legacy output FERR#, IERR# and other non-

AGTL+ signals (THERMTRIP# and PROCHOT#) utilize Open Drain output buffers. These

signals do not have setup or hold time specifications in relation to BCLK[1:0]. However,

all of the CMOS signals are required to be asserted for more than four BCLKs in order

for the processor to recognize them. See Section 3.10 for the DC specifications for the

CMOS signal groups.

3.9

Maximum Ratings

Table 5 specifies absolute maximum and minimum ratings. Within functional operation

limits, functionality and long-term reliability can be expected.

At conditions outside functional operation condition limits, but within absolute

maximum and minimum ratings, neither functionality nor long term reliability can be

expected. If a device is returned to conditions within functional operation limits after

having been subjected to conditions outside these limits, but within the absolute

maximum and minimum ratings, the device may be functional, but with its lifetime

degraded depending on exposure to conditions exceeding the functional operation

condition limits.

At conditions exceeding absolute maximum and minimum ratings, neither functionality

nor long term reliability can be expected. Moreover, if a device is subjected to these

conditions for any length of time then, when returned to conditions within the

functional operating condition limits, it will either not function or its reliability will be

severely degraded.

Although the processor contains protective circuitry to resist damage from static

electric discharge, precautions should always be taken to avoid high static voltages or

electric fields.

NOTES:

For functional operation, all processor electrical, signal quality, mechanical and thermal

specifications must be satisfied.

Storage temperature is applicable to storage conditions only. In this scenario, the

processor must not receive a clock, and no lands can be connected to a voltage bias. For

functional operation, please refer to the processor case temperature specifications.

This rating applies to the processor and does not include any tray or packaging.

Failure to adhere to this specification can affect the long term reliability of the processor.

Table 5.

Processor Absolute Maximum Ratings

Symbol

Parameter

Min

Max

Unit

Notes1

TSTORAGE

Processor storage temperature

-40

°C

2,3,4

VCC

Any processor supply voltage with

respect to VSS

-0.3

1.55

VinAGTL+

AGTL+ buffer DC input voltage with

respect to VSS

-0.1

1.55

VinAsynch_CMOS

CMOS buffer DC input voltage with

respect to VSS

-0.1

1.55

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