R27 datasheet(114/487 Pages) RENESAS

114 / 487 page

R8C/26 Group, R8C/27 Group

10. Clock Generation Circuit

Rev.2.10

Sep 26, 2008

Page 95 of 453

REJ09B0278-0210

10.5.1.1

High-Speed Clock Mode

The XIN clock divided by 1 (no division), 2, 4, 8, or 16 provides the CPU clock. Set the CM06 bit to 1 (divide-

by-8 mode) when transiting to high-speed on-chip oscillator mode, low-speed on-chip oscillator mode. If the

CM14 bit is set to 0 (low-speed on-chip oscillator on) or the FRA00 bit in the FRA0 register is set to 1 (high-

speed on-chip oscillator on), fOCO can be used as timer RA. When the FRA00 bit is set to 1, fOCO40M can be

used as timer RC.

When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used as the watchdog timer

and voltage detection circuit.

10.5.1.2

Low-Speed Clock Mode (For N, D Version Only)

The XCIN clock divided by 1 (no division), 2, 4, 8, or 16 provides the CPU clock. Set the CM06 bit to 1 (divide

by-8 mode) when transiting to high-speed on-chip oscillator mode, low-speed on-chip oscillator mode. If the

CM14 bit is set to 0 (low-speed on-chip oscillator on) or the FRA00 bit in the FRA0 register is set to 1 (high

speed on-chip oscillator on), fOCO can be used as timer RA. When the FRA00 bit is set to 1, fOCO40M can be

used as timer RC.

When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used as the watchdog timer

and voltage detection circuit.

In this mode, stopping the XIN clock and high-speed on-chip oscillator, and setting the FMR47 bit in the FMR4

To enter wait mode from low-speed clock mode, setting the VCA20 bit in the VCA2 register to 1 (internal

power low consumption enabled) enables lower consumption current in wait mode.

When enabling reduced internal power consumption using the VCA20 bit, follow Figure 10.14 Procedure for

Enabling Reduced Internal Power Consumption Using VCA20 bit.

10.5.1.3

High-Speed On-Chip Oscillator Mode

The high-speed on-chip oscillator is used as the on-chip oscillator clock when the FRA00 bit in the FRA0

chip oscillator divided by 1 (no division), 2, 4, 8, or 16 provides the CPU clock. Set the CM06 bit to 1 (divide-

by-8 mode) when transiting to high-speed clock mode. If the FRA00 bit is set to 1, fOCO40M can be used as

timer RC.

When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used as the watchdog timer

and voltage detection circuit.

10.5.1.4

Low-Speed On-Chip Oscillator Mode

If the CM14 bit in the CM1 register is set to 0 (low-speed on-chip oscillator on) or the FRA01bit in the FRA0

The on-chip oscillator clock divided by 1 (no division), 2, 4, 8 or 16 provides the CPU clock. The on-chip

oscillator clock is also the clock source for the peripheral function clocks. Set the CM06 bit to 1 (divide-by-8

mode) when transiting to high-speed clock mode. When the FRA00 bit is set to 1, fOCO40M can be used as

timer RC.

When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used as the watchdog timer

and voltage detection circuit.

In this mode, stopping the XIN clock and high-speed on-chip oscillator, and setting the FMR47 bit in the FMR4

To enter wait mode from low-speed on-chip oscillator mode, setting the VCA20 bit in the VCA2 register to 1

(internal power low consumption enabled) enables lower consumption current in wait mode.

When enabling reduced internal power consumption using the VCA20 bit, follow Figure 10.14 Procedure for

Enabling Reduced Internal Power Consumption Using VCA20 bit.

R27 Datasheet(PDF) 114 Page - Renesas Technology Corp

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