| Electronic Components Datasheet Search |
|
R28 Datasheet(PDF) 342 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R28 Datasheet(HTML) 342 Page - Renesas Technology Corp |
|
342 / 473 page ![]() R8C/28 Group, R8C/29 Group 17. Hardware LIN Rev.2.10 Sep 26, 2008 Page 323 of 441 REJ09B0279-0210 Figure 17.10 Example of Header Field Reception Flowchart (3) Hardware LIN Read the Synch Field measurement- completed flag SFDCT flag in the LINST register UART0 Set the UART0 communication rate U0BRG register Communication via UART0 (The SBDCT flag is set when the timer RA counter underflows upon reaching the terminal count.) B SFDCT = 1 ? YES UART0 Communication via UART0 Clock asynchronous serial interface (UART) mode Transmit ID field NO Hardware LIN measures the Synch Field. The interrupt of timer RA may be used (the SBDCT flag is set when the timer RA counter underflows upon reaching the terminal count). When the SBE bit in the LINCR register is set to 1 (unmasked after Synch Field measurement is completed), timer RA may be used in timer mode after the SFDCT bit in the LINST register is set to 1. Set a communication rate based on the Synch Field measurement result. YES Timer RA Set the Synch Break width again TRAPRE register TRA register |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |