R28 datasheet(358/473 Pages) RENESAS

358 / 473 page

R8C/28 Group, R8C/29 Group

18. A/D Converter

Rev.2.10

Sep 26, 2008

Page 339 of 441

REJ09B0279-0210

18.7

Notes on A/D Converter

• Write to each bit (other than bit 6) in the ADCON0 register, each bit in the ADCON1 register, or the SMP bit

in the ADCON2 register when A/D conversion is stopped (before a trigger occurs).

When the VCUT bit in the ADCON1 register is changed from 0 (VREF not connected) to 1 (VREF

connected), wait for at least 1

µs before starting the A/D conversion.

• After changing the A/D operating mode, select an analog input pin again.

• When using the one-shot mode, ensure that A/D conversion is completed before reading the AD register. The

IR bit in the ADIC register or the ADST bit in the ADCON0 register can be used to determine whether A/D

conversion is completed.

• When using the repeat mode, select the frequency of the A/D converter operating clock

φAD or more for the

CPU clock during A/D conversion.

Do not select the fOCO-F for the

φAD.

• If the ADST bit in the ADCON0 register is set to 0 (A/D conversion stops) by a program and A/D conversion

is forcibly terminated during an A/D conversion operation, the conversion result of the A/D converter will be

undefined. If the ADST bit is set to 0 by a program, do not use the value of the AD register.

• Connect 0.1

µF capacitor between the P4_2/VREF pin and AVSS pin.

• Do not enter stop mode during A/D conversion.

• Do not enter wait mode when the CM02 bit in the CM0 register is set to 1 (peripheral function clock stops in

wait mode) during A/D conversion.

R28 Datasheet(PDF) 358 Page - Renesas Technology Corp