R28 datasheet(359/473 Pages) RENESAS

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R8C/28 Group, R8C/29 Group

19. Flash Memory

Rev.2.10

Sep 26, 2008

Page 340 of 441

REJ09B0279-0210

19. Flash Memory

19.1

Overview

In the flash memory, rewrite operations to the flash memory can be performed in three modes

: CPU rewrite,

standard serial I/O, and parallel I/O.

Table 19.1 lists the Flash Memory Performance (refer to Tables 1.1 and 1.2 Functions and Specifications for

items not listed in Table 19.1).

NOTES:

1. Definition of programming and erasure endurance

The programming and erasure endurance is defined on a per-block basis. If the programming and erasure

endurance is n (n = 100 or 10,000), each block can be erased n times. For example, if 1,024 1-byte writes are

performed to different addresses in block A, a 1-Kbyte block, and then the block is erased, the programming/

erasure endurance still stands at one. When performing 100 or more rewrites, the actual erase count can be

reduced by executing programming operations in such a way that all blank areas are used before performing an

erase operation. Avoid rewriting only particular blocks and try to average out the programming and erasure

endurance of the blocks. It is also advisable to retain data on the erasure endurance of each block and limit the

number of erase operations to a certain number.

2. Blocks A and B are implemented only in the R8C/29 group.

3. To perform programming and erasure, use VCC = 2.7 to 5.5 V as the supply voltage. Do not perform

programming and erasure at less than 2.7 V.

Table 19.1

Flash Memory Performance

Item

Specification

Flash memory operating mode

3 modes (CPU rewrite, standard serial I/O, and parallel I/O)

Division of erase block

Refer to Figures 19.1 and 19.2

Programming method

Byte unit

Erase method

Block erase

Programming and erasure control method(3)

Program and erase control by software command

Rewrite control method

Rewrite control for blocks 0 and 1 by FMR02 bit in FMR0 register

Rewrite control for block 0 by FMR15 bit and block 1 by FMR16 bit in

FMR1 register

Number of commands

5 commands

Programming and

erasure

endurance(1)

Blocks 0 and 1 (program

ROM)

R8C/28 Group: 100 times; R8C/29 Group: 1,000 times

Blocks A and B (data

flash)(2)

10,000 times

ID code check function

Standard serial I/O mode supported

ROM code protect

Parallel I/O mode supported

Table 19.2

Flash Memory Rewrite Modes

Flash memory

Rewrite mode

CPU Rewrite Mode

Standard Serial I/O

Mode

Parallel I/O Mode

Function

User ROM area is rewritten by executing

software commands from the CPU.

EW0 mode: Rewritable in the RAM

EW1 mode: Rewritable in flash memory

User ROM area is

rewritten by a

dedicated serial

programmer.

User ROM area is

rewritten by a

dedicated parallel

programmer.

Areas which can

be rewritten

User ROM area

Operating mode

Single chip mode

Boot mode

Parallel I/O mode

ROM Programmer None

Serial programmer

Parallel programmer

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