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Product data sheet

Rev. 01 — 13 December 2005

3 of 13

Philips Semiconductors

PCK946

Low voltage 1 : 10 CMOS clock driver

5.

Pinning information

5.1 Pinning

5.2 Pin description

Fig 2.

Pin configuration for LQFP32

PCK946BD

TCLK_SEL

GND

VCCI

QB0

TCLK0

TCLK1

QB1

DSELA

GND

DSELB

QB2

DSELC

GNDI

002aaa677

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

Table 2:

Pin description

Symbol

Pin

Description

DSELA, DSELB, DSELC

5, 6, 7

output bank divide select input

GND

11, 15, 20, 24,

27, 31

ground

GNDI

8

ground

MR/OE

32

internal reset and output (high-impedance) control

QA0, QA1, QA2

30, 28, 26

bank A outputs

QB0, QB1, QB2

23, 21, 19

bank B outputs

QC0, QC1, QC2, QC3

10, 12, 14, 16

bank C outputs

TCLK_SEL

1

CMOS clock select input

TCLK0, TCLK1

3, 4

CMOS clock inputs

9, 13, 17, 18,

22, 25, 29

supply voltage

VCCI

2

supply voltage