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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 01 — 13 December 2005

6 of 13

Philips Semiconductors

PCK946

Low voltage 1 : 10 CMOS clock driver

10. Application information

10.1 Driving transmission lines

The PCK946 clock driver was designed to drive high speed signals in a terminated

transmission line environment. To provide the optimum flexibility to the user the output

drivers were designed to exhibit the lowest impedance possible. With an output

impedance of approximately 10

Ω the drivers can drive either parallel or series terminated

transmission lines.

In most high performance clock networks point-to-point distribution of signals is the

method of choice. In a point-to-point scheme either series terminated or parallel

terminated transmission lines can be used. The parallel technique terminates the signal at

the end of the line with a 50

Ω resistance to 0.5V

level of DC current and thus only a single terminated line can be driven by each output of

the PCK946 clock driver. For the series terminated case however there is no DC current

draw, thus the outputs can drive multiple series terminated lines. Figure 3, illustrates an

output driving a single series terminated line versus two series terminated lines in parallel.

When taken to its extreme the fan-out of the PCK946 clock driver is effectively doubled

due to its capability to drive multiple lines.

The waveform plots of Figure 4 show simulation results of an output driving a single line

versus two lines. In both cases the drive capability of the PCK946 output buffers is more

than sufficient to drive 50

Ω transmission lines on the incident edge. Note from the delay

measurements in the simulations a delta of only 43 ps exists between the two differently

loaded outputs. This suggests that the dual line driving need not be used exclusively to

maintain the tight output-to-output skew of the PCK946. The output waveform in Figure 4

shows a step in the waveform, this step is caused by the impedance mismatch seen

looking into the driver. The parallel combination of the 43

Ω series resistor plus the output

impedance does not match the parallel combination of the line impedances. The voltage

wave launched down the two lines will equal:

Fig 3.

Single versus dual transmission lines

Zo = 50 Ω

002aaa678

Rs = 43 Ω

Zo = 50 Ω

Rs = 43 Ω

PCK946

OUTPUT

BUFFER

OutB1

OutB0

7

Ω

Zo = 50 Ω

Rs = 43 Ω

PCK946

OUTPUT

BUFFER

OutA

7

Ω

IN

IN

Ro

Ro

V

L

V

S

Z

o

R

s

R

o

Z

o

++

------------------------------





3.0

25

53.5

----------





1.40 V

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