ATA6623 datasheet(8/24 Pages) ATMEL

8 / 24 page

4957H–AUTO–05/10

ATA6623/ATA6625

4.3

Sleep Mode

A falling edge at EN while TXD is low switches the IC into Sleep Mode. The TXD Signal has to

be logic low during the Mode Select window (Figure 4-4 on page 8). To avoid influencing the

LIN-pin during the switch to sleep mode, it is possible to switch the EN up to 3.2 µs earlier to

LOW than the TXD. Even if the two falling edges at TXD and EN occur at the same time, the LIN

line will remain uninfluenced.

In Sleep Mode the transmission path is disabled. The supply current I

VSsleep from VBatt is typically

10 µA. The V

CC regulator is switched off, NRES and RXD are low. The internal slave termination

between pin LIN and pin VS is disabled, only a weak pull-up current (typically 10 µA) between

pin LIN and pin VS is present. Sleep Mode can be activated independently from the current level

on pin LIN.

A voltage less than the LIN Pre-wake detection V

LINL at pin LIN activates the internal LIN

receiver and switches on the internal slave termination between the LIN pin and the VS pin.

A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time

period (t

bus) and a following rising edge at pin LIN results in a remote wake-up request. The

device switches from Sleep Mode to Fail-safe Mode.

The V

CC regulator is activated, and the remote wake-up request is indicated by a low level at the

RXD pin to interrupt the microcontroller (Figure 4-5 on page 9).

EN high can be used to switch directly from Sleep to Fail-safe Mode. If EN is still high after VCC

ramp up and undervoltage reset time, the IC switches to Normal Mode.

Figure 4-4.

Switch to Sleep Mode

Delay time sleep mode

td_sleep = maximum 20 µs

LIN switches directly to recessive mode

td = 3.2 µs

LIN

VCC

NRES

TXD

Sleep Mode

Normal Mode

Mode select window

ATA6623 Datasheet(PDF) 8 Page - ATMEL Corporation