ATA6623 datasheet(18/24 Pages) ATMEL

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4957H–AUTO–05/10

ATA6623/ATA6625

10.8

Duty cycle 3

THRec(max) = 0.778 × VS

THDom(max) = 0.616 × VS

S = 7.0V to 18V

tBit = 96 µs

D3 = t

bus_rec(min)/(2 × tBit)

LIN

0.417

10.9

Duty cycle 4

Rec(min) = 0.389 × VS

Dom(min) = 0.251 × VS

VS = 7.6V to 18V

Bit = 96 µs

D4 = t

bus_rec(max)/(2 × tBit)

LIN

0.590

10.10

Slope time falling and

rising edge at LIN

S = 7.0V to 18V

LIN

SLOPE_fall

tSLOPE_rise

3.5

22.5

µs

Receiver Electrical AC Parameters of the LIN Physical Layer

LIN Receiver, RXD Load Conditions: C

RXD = 20 pF

11.1

Propagation delay of

receiver Figure 9-1

S = 7.0V to 18V

rx_pd = max(trx_pdr , trx_pdf)

RXD

trx_pd

6µs

11.2

Symmetry of receiver

propagation delay rising

edge minus falling edge

S = 7.0V to 18V

rx_sym = trx_pdr – trx_pdf

RXD

trx_sym

–2

µs

Electrical Characteristics (Continued)

5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins.

No.

Parameters

Test Conditions

Symbol

Min.

Typ.

Max.

Unit

Type*

*) Type means: A = 100% tested, B = 100% correlation tested, C = Charact1

erized on samples, D = Design parameter

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