R5F52108ADFF datasheet(41/92 Pages) RENESAS

41 / 92 page

R01DS0041EJ0050 Rev.0.50

Page 41 of 90

Apr 15, 2011

RX210 Group

2. CPU

Under development Preliminary document

Specifications in this document are tentative and subject to change.

2.5.2

Access to I/O Registers

The addresses of I/O registers are fixed, and this is regardless of whether the setting is for little endian or big endian.

Accordingly, changes to the endian do not affect access to I/O registers. For the arrangements of I/O registers, refer to the

descriptions of registers in the relevant sections.

Table 2.9

8-Bit Read Operations when Little Endian has been Selected

Operation

Address of src

Reading an 8-bit unit

from address 0

Reading an 8-bit unit

from address 1

Reading an 8-bit unit

from address 2

Reading an 8-bit unit

from address 3

Address 0

Transfer to LL

—

Address 1

—

Transfer to LL

—

Address 2

—

Transfer to LL

—

Address 3

—

Transfer to LL

Table 2.10

8-Bit Read Operations when Big Endian has been Selected

Operation

Address of src

Reading an 8-bit unit

from address 0

Reading an 8-bit unit

from address 1

Reading an 8-bit unit

from address 2

Reading an 8-bit unit

from address 3

Address 0

Transfer to LL

—

Address 1

—

Transfer to LL

—

Address 2

—

Transfer to LL

—

Address 3

—

Transfer to LL

Table 2.11

8-Bit Write Operations when Little Endian has been Selected

Operation

Address of dest

Writing an 8-bit unit to

address 0

Writing an 8-bit unit to

address 1

Writing an 8-bit unit to

address 2

Writing an 8-bit unit to

address 3

Address 0

Transfer from LL

—

Address 1

—

Transfer from LL

—

Address 2

—

Transfer from LL

—

Address 3

—

Transfer from LL

Table 2.12

8-Bit Write Operations when Big Endian has been Selected

Operation

Address of dest

Writing an 8-bit unit to

address 0

Writing an 8-bit unit to

address 1

Writing an 8-bit unit to

address 2

Writing an 8-bit unit to

address 3

Address 0

Transfer from LL

—

Address 1

—

Transfer from LL

—

Address 2

—

Transfer from LL

—

Address 3

—

Transfer from LL

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