R5F52108ADFF datasheet(10/92 Pages) RENESAS

10 / 92 page

R01DS0041EJ0050 Rev.0.50

Page 10 of 90

Apr 15, 2011

RX210 Group

1. Overview

Under development Preliminary document

Specifications in this document are tentative and subject to change.

Multi-function timer

pulse unit 2 (MTU2)

MTIOC0A, MTIOC0B

MTIOC0C, MTIOC0D

I/O

The TGRA0 to TGRD0 input capture input/output compare output/

PWM output pins.

MTIOC1A, MTIOC1B

I/O

The TGRA1 and TGRB1 input capture input/output compare output/

PWM output pins.

MTIOC2A, MTIOC2B

I/O

The TGRA2 and TGRB2 input capture input/output compare output/

PWM output pins.

MTIOC3A, MTIOC3B

MTIOC3C, MTIOC3D

I/O

The TGRA3 to TGRD3 input capture input/output compare output/

PWM output pins.

MTIOC4A, MTIOC4B

MTIOC4C, MTIOC4D

I/O

The TGRA4 to TGRD4 input capture input/output compare output/

PWM output pins.

MTIC5U, MTIC5V, MTIC5W

Input

The TGRU5, TGRV5, and TGRW5 input capture input/external

pulse input pins.

MTCLKA, MTCLKB,

MTCLKC, MTCLKD

Input

Input pins for external clock signals.

Port output enable 2

(POE2)

POE0# to POE3#, POE8#

Input

Input pins for request signals to place the MTU2 pins in the high

impedance state.

8-bit timer (TMR)

TMO0 to TMO3

Output

Compare match output pins.

TMCI0 to TMCI3

Input

Input pins for external clocks to be input to the counter.

TMRI0 to TMRI3

Input

Input pins for the counter reset.

Realtime clock

(RTC)

RTCOUT

Output

Output pin for 1-Hz clock.

RTCIC0 to RTCIC2

Input

Tamper resistant event input pins.

Serial

communications

interface (SCIc)

 Asynchronous mode/clock synchronous mode

SCK0, SCK1, SCK5, SCK6,

SCK8, SCK9

I/O

Input/output pins for clock signals

RXD0, RXD1, RXD5, RXD6,

RXD8, RXD9

Input

Input pins for received data

TXD0, TXD1, TXD5, TXD6,

TXD8, TXD9

Output

Output pins for transmitted data

CTS0#, CTS1#, CTS5#,

CTS6#, CTS8#, CTS9#

Input

Input pins for controlling the start of transmission and reception

RTS0#, RTS1#, RTS5#,

RTS6#, RTS8#, RTS9#

Output

Output pins for controlling the start of transmission and reception

 Simple I2C mode

SSCL0, SSCL1, SSCL5,

SSCL6, SSCL8, SSCL9

I/O

Input/output pins for the I2C clock

SSDA0, SSDA1, SSDA5,

SSDA6, SSDA8, SSDA9

I/O

Input/output pins for the I2C data

 Simple SPI mode

SCK0, SCK1, SCK5, SCK6,

SCK8, SCK9

I/O

Input/output pins for the clock

SMISO0, SMISO1, SMISO5,

SMISO6, SMISO8, SMISO9

I/O

Input/output pins for slave transmission of data

SMOSI0, SMOSI1, SMOSI5,

SMOSI6, SMOSI8, SMOSI9

I/O

Input/output pins for master transmission of data

SS0# to SS11#

Input

Chip-select input pins

Table 1.4

Pin Functions (2 / 4)

Classifications

Pin Name

I/O

Description

R5F52108ADFF Datasheet(PDF) 10 Page - Renesas Technology Corp

R5F52108ADFF Datasheet(HTML) 10 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL