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R5F52108ADFF Datasheet(PDF) 28 Page - Renesas Technology Corp |
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R5F52108ADFF Datasheet(HTML) 28 Page - Renesas Technology Corp |
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28 / 92 page ![]() R01DS0041EJ0050 Rev.0.50 Page 28 of 90 Apr 15, 2011 RX210 Group 2. CPU Under development Preliminary document Specifications in this document are tentative and subject to change. 2.2 Register Set of the CPU The RX CPU has sixteen general-purpose registers, eight control registers, and one accumulator used for DSP instructions. Figure 2.1 Register Set of the CPU Note 1. The stack pointer (SP) can be the interrupt stack pointer (ISP) or user stack pointer (USP), according to the value of the U bit in the PSW register. USP (User stack pointer) ISP (Interrupt stack pointer) INTB (Interrupt table register) PC (Program counter) PSW (Processor status word) BPC (Backup PC) BPSW (Backup PSW) FINTV (Fast interrupt vector register) R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 (SP) *1 General-purpose register Control register b31 b0 b31 b0 DSP instruction register b63 b0 ACC (Accumulator) |
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