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M68HC11KA Datasheet(PDF) 43 Page - Motorola, Inc |
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M68HC11KA Datasheet(HTML) 43 Page - Motorola, Inc |
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43 / 68 page ![]() MC68HC11KA4 MOTOROLA MC68HC11KA4TS/D 43 FE — Framing Error FE is set when a zero is detected where a stop bit was expected. Clear the FE flag by reading SCSR1 with FE set and then reading SCDR. 0 = Stop bit detected 1 = Zero detected PF — Parity Error Flag PF is set if received data has incorrect parity. Clear PF by reading SCSR1 with PE set and then reading SCDR. 0 = Parity correct 1 = Incorrect parity detected Bits [7:1] — Not implemented Always read zero RAF — Receiver Active Flag (Read only) 0 = A character is not being received 1 = A character is being received R8 — Receiver Bit 8 Ninth serial data bit received when SCI is configured for a nine data bit operation. T8 — Transmitter Bit 8 Ninth serial data bit transmitted when SCI is configured for a nine data bit operation. Bits [5:0] — Not implemented Always read zero R/T[7:0] — Receiver/Transmitter Data Bits [7:0] SCI data is double buffered in both directions. SCSR2 —SCI Status Register 2 $0075 Bit 7 654321 Bit 0 ——————— RAF RESET: 0000000 0 SCDRH/L —SCI Data Register High/Low $0076, $0077 Bit 7 6543 2 1 Bit 0 $0076 R8 T8 — — — — — — SCDRH (High) $0077 R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0 SCDRL (Low) |
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