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M68HC11KA Datasheet(PDF) 44 Page - Motorola, Inc |
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M68HC11KA Datasheet(HTML) 44 Page - Motorola, Inc |
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44 / 68 page  MOTOROLA MC68HC11KA4 44 MC68HC11KA4TS/D 8 Serial Peripheral Interface The SPI allows the MCU to communicate synchronously with peripheral devices and other micropro- cessors. Data rates can be as high as 2 Mbits per second when configured as a master and 4 Mbits per second when configured as a slave (assuming 4 MHz bus speed). Two control bits in OPT2 allow the transfer of data either MSB or LSB first and select an additional divide by four stage to be inserted before the SPI baud rate clock divider. Figure 12 SPI Block Diagram SPI BLOCK 2SPR SPI CONTROL REGISTER SPI STATUS REGISTER 8/16-BIT SHIFT REGISTER READ DATA BUFFER MSB LSB INTERNAL DATA BUS SPI INTERRUPT REQUEST MSTR SPE SPI CLOCK (MASTER) SPI CONTROL SELECT DIVIDER INTERNAL MCU CLOCK CLOCK LOGIC CLOCK S M S M M S MISO PD2 MOSI PD3 SCK PD4 SS PD5 ÷2 ÷4 ÷16 ÷32 8 8 8 |
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