AD9643 datasheet(15/36 Pages) AD

15 / 36 page

AD9643

Rev. A | Page 15 of 36

Pin No.

Mnemonic

Type

Description

B D4+/D5+

Output

Channel B LVDS Output Data 4/Data 5—True.

B D6−/D7−

Output

Channel B LVDS Output Data 6/Data 7—Complement.

B D6+/D7+

Output

Channel B LVDS Output Data 6/Data 7—True.

B D8−/D9−

Output

Channel B LVDS Output Data 8/Data 9—Complement.

B D8+/D9+

Output

Channel B LVDS Output Data 8/Data 9—True.

B D10−/D11−

Output

Channel B LVDS Output Data 10/Data 11—Complement.

B D10+/D11+

Output

Channel B LVDS Output Data 10/Data 11—True.

B D12−/D13−

(MSB)

Output

Channel B LVDS Output Data 12/Data 13—Complement.

B D12+/D13+

(MSB)

Output

Channel B LVDS Output Data 12/Data 13—True.

A D0−/D1− (LSB)

Output

Channel A LVDS Output Data 0/Data 1—Complement.

A D0+/D1+ (LSB)

Output

Channel A LVDS Output Data 0/Data 1—True.

A D2−/D3−

Output

Channel A LVDS Output Data 2/Data 3—Complement.

A D2+/D3+

Output

Channel A LVDS Output Data 2/Data 3—True.

A D4−/D5−

Output

Channel A LVDS Output Data 4/Data 5—Complement.

A D4+/D5+

Output

Channel A LVDS Output Data 4/Data 5—True.

A D6−/D7−

Output

Channel A LVDS Output Data 6/Data 7—Complement.

A D6+/D7+

Output

Channel A LVDS Output Data 6/Data 7—True.

A D8−/D9−

Output

Channel A LVDS Output Data 8/Data 9—Complement.

A D8+/D9+

Output

Channel A LVDS Output Data 8/Data 9—True.

A D10−/D11−

Output

Channel A LVDS Output Data 10/Data 11—Complement.

A D10+/D11+

Output

Channel A LVDS Output Data 10/Data 11—True.

A D12−/D13−

(MSB)

Output

Channel A LVDS Output Data 12/Data 13—Complement.

A D12+/D13+

(MSB)

Output

Channel A LVDS Output Data 12/Data 13—True.

OR+

Output

Channel A/Channel B LVDS Overrange Output—True.

OR−

Output

Channel A/Channel B LVDS Overrange Output—Complement.

DCO+

Output

Channel A/Channel B LVDS Data Clock Output—True.

DCO−

Output

Channel A/Channel B LVDS Data Clock Output—Complement.

SPI Control

SCLK

Input

SPI Serial Clock.

SDIO

Input/Output

SPI Serial Data Input/Output.

CSB

Input

SPI Chip Select (Active Low).

Output Enable and Power-Down

OEB

Input

Output Enable Input (Active Low).

PDWN

Input

Power-Down Input (Active High). The operation of this pin

depends on the SPI mode and can be configured as power-

down or standby (see Table 14).

AD9643 Datasheet(PDF) 15 Page - Analog Devices

AD9643 Datasheet(HTML) 15 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Download

Link URL