LH28F008SC datasheet(22/38 Pages) SHARP

22 / 38 page

LH28F008SC

8M (1M × 8) Flash Memory

Capacitance

TA = +25°C, f = 1 MHz

SYMBOL

PARAMETER

TYP.

MAX.

UNITS

CONDITIONS

Input Capacitance

IN = 0.0 V

OUT

Output Capacitance

OUT = 0.0 V

NOTE:

1. Sampled, not 100% tested.

AC INPUT/OUTPUT TEST CONDITIONS

Figure 12. Transient Input/Output Reference

Waveform for V

CC = 3.3 V ±0.3 V and VCC = 5 V ±5%

(High Speed Testing Configuration)

Figure 13. Transient Input/Output Reference

Waveform for V

CC = 5 V ±10%

(Standard Testing Configuration)

28F008SC-14

DEVICE

UNDER

TEST

NOTE: CL Includes Jig Capacitance

1.3 V

1N914

RL = 3.3 kΩ

OUT

Figure 14. Transient Equivalent

Testing Load Circuit

INPUT

TEST POINTS

OUTPUT

3.0

0.0

1.5

28F008SC-12

NOTE:

AC test inputs are driven at 3.0 V for a Logic '1' and 0.0 V for a

Logic '0'. Input timing begins and output timing ends at 1.5 V.

Input rise and fall times (10% to 90%) < 10 ns.

INPUT

TEST POINTS

OUTPUT

2.4

0.45

2.0

0.8

2.0

0.8

28F008SC-13

NOTE:

AC test inputs are driven at VOH (2.4 VTTL) for a Logic '1' and VOL

(0.45 VTTL) for a Logic '0'. Input timing begins at VIH (2.0 VTTL)

and VIL (0.8 VTTL). Output timing ends at VIH and VIL. Input rise

and fall times (10% to 90%) < 10 ns.

TEST CONFIGURATION

L (pF)

CC = 3.3 V ± 0.3 V

CC = 5 V ± 0.5%

CC = 5 V ± 10%

100

Test Configuration Capacitance

Loading Value

LH28F008SC Datasheet(PDF) 22 Page - Sharp Corporation

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