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STM32F407IG Datasheet(PDF) 120 Page - STMicroelectronics

Part # STM32F407IG
Description  USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
PDF  154 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F407IG Datasheet(HTML) 120 Page - STMicroelectronics

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Electrical characteristics
STM32F405xx, STM32F407xx
120/154
Doc ID 022152 Rev 1
Figure 49.
Asynchronous multiplexed PSRAM/NOR write waveforms
Table 73.
Asynchronous multiplexed PSRAM/NOR write timings(1)(2)(3)
1.
CL = 15 pF.
2.
Preliminary values.
3.
TBD stands for “to be defined”.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
TBD
TBD
ns
tv(NWE_NE)
FSMC_NEx low to FSMC_NWE low
TBD
TBD
ns
tw(NWE)
FSMC_NWE low time
TBD
TBD
ns
th(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time
TBD
-
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
-
TBD
ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
TBD
TBD
ns
tw(NADV)
FSMC_NADV low time
TBD
TBD
ns
th(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC_NADV high
TBD
-
ns
th(A_NWE)
Address hold time after FSMC_NWE high
TBD
-
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
TBD
ns
th(BL_NWE)
FSMC_BL hold time after FSMC_NWE high
TBD
-
ns
tv(Data_NADV) FSMC_NADV high to Data valid
-
TBD
ns
th(Data_NWE) Data hold time after FSMC_NWE high
TBD
-
ns
NBL
Data
FSMC_NEx
FSMC_NBL[1:0]
FSMC_AD[15:0]
tv(BL_NE)
th(Data_NWE)
FSMC_NOE
Address
FSMC_A[25:16]
tv(A_NE)
tw(NWE)
FSMC_NWE
tv(NWE_NE)
t h(NE_NWE)
th(A_NWE)
th(BL_NWE)
t v(A_NE)
tw(NE)
ai14891B
Address
FSMC_NADV
t v(NADV_NE)
tw(NADV)
t v(Data_NADV)
th(AD_NADV)



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