MCLK

AINx

(1)

CLP_y

(2)

SHP_y

(2)

SHD_y

(2)

MCLK

AINx

(1)

SHP_y

(2)

SHD_y

(2)

t

FC_y

t

CW_y

t

RP_y

t

PW_y

t

RP_y

t

PW_y

a)PixelClamp

b)ClampDuringCLPDMActive

VSP5620

VSP5621

VSP5622

www.ti.com

SBES022

– JULY 2011

during each pixel period, as shown in Figure 6a. Because the ac-coupling capacitor is charged on a pixel-to-pixel

basis, the clamp level droop can be controlled by the clamp pulse width.

In line clamp mode, SHP_A/B is used for clamping when CLPDM is active, as shown in Figure 6b. The input

signal is clamped only in the CLPDM period within one line cycle of the sensor. The signal is clamped in this

method because the charge leaks the least from the coupling capacitor during the CLPDM period. Accordingly,

because there may be a large droop in the clamp level, this device does not support line clamp in the SH mode.

The not-clamped mode is mainly used in for a CMOS sensor input. If the sensor signal is directly connected to

the AFE, this mode should be configured without an ac-coupling capacitor at the input port. This mode has two

options to select a reference for the sensor black level: internal reference and external input. In the internal

external input is used from AINGNDx with AINx_CLP_SEL = 3.

(1) x = AIN channel number, x = 1, 2, 3, and 4.

(2) y = Group code of sample pulse signals. When x = 1 or 2, y = A. When x = 3 or 4, y = B.

Figure 6. Input Clamp Function

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© 2011, Texas Instruments Incorporated

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