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VSP5621 Datasheet(PDF) 12 Page - Texas Instruments

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Part # VSP5621
Description  16-Bit, 4-Channel, CCD/CMOS Sensor Analog Front-End with LED Driver
PDF  41 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

VSP5621 Datasheet(HTML) 12 Page - Texas Instruments

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VDD
VSS
a)NegativeSignalInput(AINx_POL
=0)
(1)
b)PositiveSignalInput(AINx_POL
=1)
(1)
VDD
VSS
1/f
PIX
V
SIG
V
OFFSET
V
RST
V
OFFSET
V
SIG
1/f
PIX
VSP5620
VSP5621
VSP5622
SBES022
– JULY 2011
www.ti.com
THERMAL INFORMATION
VSP562xRSL
THERMAL METRIC(1)
RSL
UNITS
48 PINS
θJA
Junction-to-ambient thermal resistance
25.8
θJCtop
Junction-to-case (top) thermal resistance
13.2
θJB
Junction-to-board thermal resistance
3.5
°C/W
ψJT
Junction-to-top characterization parameter
0.2
ψJB
Junction-to-board characterization parameter
3.5
θJCbot
Junction-to-case (bottom) thermal resistance
0.4
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
PARAMETERIC MEASUREMENT INFORMATION
Analog Input Specification (AIN1, AIN2, AIN3, AIN4)
The analog input specification has two signal inputs: negative and positive. These inputs are shown in Figure 1a
and Figure 1b, respectively.
Figure 1. Analog Input Definition
Table 1. Timing Characteristics for Figure 1
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VSP5620
1
11.66
MHz/Ch
Input pixel rate
fPIX
VSP5621
1
16.66
MHz/Ch
VSP5622
1
23.33
MHz/Ch
Negative (AINx_POL(1) = 0)
VOFFSET
V
Signal range
VSIG
Positive (AINx_POL(1) = 1)
VDD
– VOFFSET
V
Maximum full-scale range
VSIG
Gain = 0.5 V/V
1.8
2
2.2
V
Reset field through noise
VRST
–VOFFSET
VDD
– VOFFSET
V
range
Fixed level clamp mode (REF_SEL = 0)
2.2
V
Internal reference level clamp mode
VRINT
V
Offset level
VOFFSET
(REF_SEL = 1)
External reference level clamp mode
VREXT
V
(REF_SEL = 2)
(1)
AINx_POL = Analog input polarity setting register (x = 1, 2, 3, and 4).
12
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Copyright
© 2011, Texas Instruments Incorporated
Product Folder Link(s): VSP5620 VSP5621 VSP5622



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