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LPC4350 Datasheet(PDF) 123 Page - NXP Semiconductors |
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LPC4350 Datasheet(HTML) 123 Page - NXP Semiconductors |
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123 / 149 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Objective data sheet Rev. 3.1 — 5 January 2012 123 of 149 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller [1] In the DAC CR register, bit BIAS = 0 (see the LPC43xx user manual). [2] Settling time is calculated within 1/2 LSB of the final value. Rs 1/((7 f clk(ADC) Cia) 2 k Fig 36. ADC interface to pins LPC43xx ADC0_n/ADC1_n Cia = 2 pF Rvsi Rs VSS VEXT 002aag704 ADC COMPARATOR 2 kΩ (analog pin) 2.2 kΩ (multiplexed pin) Table 27. DAC characteristics VDDA(3V3) over specified ranges; Tamb = 40 C to +85 C; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit ED differential linearity error 2.7 V V DDA(3V3) 3.6 V [1] - 0.8 - LSB 2.2 V V DDA(3V3) < 2.7 V - 1.0 - LSB EL(adj) integral non-linearity 2.7 V V DDA(3V3) 3.6 V [1] - 1.0 - LSB 2.2 V V DDA(3V3) < 2.7 V - 1.5 - LSB EO offset error 2.7 V V DDA(3V3) 3.6 V [1] - 0.8 - LSB 2.2 V V DDA(3V3) < 2.7 V - 1.0 - LSB EG gain error 2.7 V V DDA(3V3) 3.6 V [1] - 0.3 - % 2.2 V V DDA(3V3) < 2.7 V - 1.0 - % CL load capacitance - - 200 pF RL load resistance 1 - - k ts settling time [1] 0.4 s |
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