AD5116

Data Sheet

Rev. 0 | Page 14 of 16

END SCALE RESISTANCE INDICATOR

When the auto save mode is enabled, the ASE pin also indicates

when the RDAC register reaches the maximum or minimum

scale. The AD5116 pulls the ASE pin high and holds it as long

as PD or PU is active, and the part is placed in the end scale

configuration is shown in Figure 40.

activating PU or PD.

AD5116

100kΩ

ASE

GND

Figure 40. Typical End Scale Indicator Circuit

RDAC ARCHITECTURE

To achieve optimum performance, Analog Devices, Inc., has

patented the RDAC segmentation architecture for all the digital

potentiometers. In particular, the AD5116 employs a two-stage

segmentation approach as shown in Figure 41. The AD5116

wiper switch is designed with the transmission gate CMOS

W

6-BIT

ADDRESS

DECODER

A

TS

BS

B

Figure 41. Simplified RDAC Circuit

Top Scale/Bottom Scale Architecture

In addition, the AD5116 includes a new feature to reduce the

resistance between terminals. These extra steps are called

bottom scale and top scale. At bottom scale, the typical wiper

resistance decreases from 70 Ω to 45 Ω. At top scale, the

resistance between Terminal A and Terminal W is decreased

by 1 LSB and the total resistance is reduced to 70 Ω. The extra

steps are not equal to 1 LSB and are not included in the INL,

DNL, R-INL, and R-DNL specifications.

PROGRAMMING THE VARIABLE RESISTOR

Rheostat Operation—±8% Resistor Tolerance

The AD5116 operates in rheostat mode when only two terminals

are used as a variable resistor. The unused terminal can be

floating or tied to the W terminal as shown in Figure 42.

W

A

B

W

A

B

W

A

B

Figure 42. Rheostat Mode Configuration

The nominal resistance between Terminal A and Terminal B,

accessed by the wiper terminal. The 6-bit data in the RDAC

latch is decoded to select one of the 64 possible wiper settings.

The general equation for determining the digitally programmed

output resistance between the W terminal and B terminal is:

BS

WB

R

R



Bottom scale

(1)

W

AB

WB

R

R

D

D

R







64

)

(

From 0 to 64

(2)

where:

D is the decimal equivalent of the binary code in the 6-bit

RDAC register.

Similar to the mechanical potentiometer, the resistance of

the RDAC between the W terminal and the A terminal also

data loaded into the latch increases. The general equation for

this operation is:

W

AB

AW

R

R

R





Bottom scale

(3)

W

AB

AW

R

R

D

D

R









64

64

)

(

From 0 to 63

(4)

TS

AW

R

R



Top scale

(5)

where:

D is the decimal equivalent of the binary code in the 6-bit

RDAC register.

Regardless of which setting the part is operating in, take care

to limit the current between the A terminal to B terminal, W

terminal to A terminal, and W terminal to B terminal, to the

maximum continuous current or pulsed current specified in

Table 4. Otherwise, degradation or possible destruction of

the internal switch contact can occur.