HT67F60 datasheet(184/242 Pages) HOLTEK

184 / 242 page

Rev. 1.50

184

March 06 , 2012

Rev. 1.50

185

March 06 , 2012

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO

Peripheral Clock Output

The Peripheral Clock Output allows the device to supply external hardware with a clock signal

synchronised to the microcontroller clock.

Peripheral Clock Operation

As the peripheral clock output pin, PCK, is shared with I/O line, the required pin function is chosen via

PCKEN in the SIMC0 register. The Peripheral Clock function is controlled using the SIMC0 register.

The clock source for the Peripheral Clock Output can originate from either the TM0 CCRP match

frequency/2 or a divided ratio of the internal fSYS clock. The PCKEN bit in the SIMC0 register is the

overall on/off control, setting PCKEN bit to "1" enables the Peripheral Clock, setting PCKEN bit to "0"

disables it. The required division ratio of the system clock is selected using the PCKP1 and PCKP0 bits

in the same register. If the device enters the SLEEP Mode this will disable the Peripheral Clock output.

●

SIMC0 Register

Bit

Name

SIM2

SIM1

SIM0

PCKEN

PCKP1

PCKP0

SIMEN

—

R/W

—

POR

—

Bit 7~5

SIM2, SIM1, SIM0: SIM operating mode control

000: SPI master mode; SPI clock is fSYS/4

001: SPI master mode; SPI clock is fSYS/16

010: SPI master mode; SPI clock is fSYS/64

011: SPI master mode; SPI clock is fTBC

100: SPI master mode; SPI clock is TM0 CCRP match frequency/2

101: SPI slave mode

110: I2C slave mode

111: Unused mode

These bits setup the overall operating mode of the SIM function. As well as selecting

if the I2C or SPI function, they are used to control the SPI Master/Slave selection and

the SPI Master clock frequency. The SPI clock is a function of the system clock but

can also be chosen to be sourced from the TM0. If the SPI Slave Mode is selected then

the clock will be supplied by an external Master device.

Bit 4

PCKEN: PCK output pin control

0: Disable

1: Enable

Bit 3~2

PCKP1, PCKP0: select PCK output pin frequency

00: fSYS

01: fSYS/4

10: fSYS/8

11: TM0 CCRP match frequency/2

Bit 1

SIMEN: SIM control

0: Disable

1: Enable

The bit is the overall on/off control for the SIM interface. When the SIMEN bit is

cleared to zero to disable the SIM interface, the SDI, SDO, SCK and SCS, or SDA and

SCL lines will be in a floating condition and the SIM operating current will be reduced

to a minimum value. When the bit is high the SIM interface is enabled. The SIM

configuration option must have first enabled the SIM interface for this bit to be

effective. Note that when the SIMEN bit changes from low to high the contents of the

SPI control registers will be in an unknown condition and should therefore be first

initialised by the application program.

Bit 0

unimplemented, read as "0"

HT67F60 Datasheet(PDF) 184 Page - Holtek Semiconductor Inc

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