MIC5167 datasheet(11/23 Pages) MICREL

11 / 23 page

Micrel, Inc.

MIC5167

January 2012

M9999-012312-B

Application Information

DDR memory requires two power supplies, one for the

memory chip, referred to as VDDQ and the other for a

termination supply VTT, which is one-half VDDQ. With

memory speeds in excess of 300MHz, the memory

system bus must be treated as transmission lines. To

maintain good signal integrity the memory bus must be

terminated to minimize signal reflections. Figure 2 shows

the simplified termination circuit. Each control, address

and data lines have these termination resistors RS and

RT connected to them.

DDR

MEMORY

PVIN

22µF

PGND

100µF

SGND

SVIN

VDDQ

VREF

100pF

0.4µH

VIN

5.0V

VDDQ

1.8V

MIC5167

CHIP SET

VDDQ

VTT/0.9V

VREF

Figure 2. DDR Memory Termination Circuit

Bus termination provides a means to increase signaling

speed while maintaining good signal integrity. The

termination network consists of a series resistor (RS)

and a terminating resistor (RT). Values of RS range

between 10Ω to 30Ω with a typical of 22Ω, while RT

ranges from 22Ω to 28Ω with a typical value of 25Ω. VTT

will dynamically sink and source current to maintain a

termination voltage under all conditions. This method of

bus termination reduces common mode noise, settling

time, voltage swings, EMI/RFI and improves slew rates.

VDDQ powers all the memory IC’s, memory drivers and

receivers for all the memory bits in the DDR memory

system. When the driver is logic low VTT sources current.

When the driver is logic high VTT sinks current. The

MIC5167 regulates VTT to VDDQ/2 during sourcing or

sinking current. The power dissipated in RS (bus

resistance) and RT (termination resistance) is VTT

squared divided by their respective resistance.

Since the voltage across the resistance is VDDQ/2, the

power dissipated is one-quarter the power of a

termination voltage of VDDQ. The memory bits are not

usually all at a logic high or logic low at the same time so

the VTT supply is usually not sinking or sourcing much

current.

VTT

VTT is regulated to VREF. Due to high speed signaling, the

load current seen by VTT is constantly changing. To

maintain adequate transient response, large OS-CON

and ceramics are recommended on VTT. The proper

combination and placement of the OS-CON and ceramic

capacitors is important to reduce both ESR and ESL

such that high-current and high-speed transients do not

exceed the dynamic voltage tolerance requirement of

VTT. The larger OS-CON capacitors provide bulk charge

storage while the smaller ceramic capacitors provide

current during the fast edges of the bus transition. Using

several smaller ceramic capacitors distributed near the

termination resistors is important to reduce the effects of

PCB trace inductance.

When VTT is sinking current, the external power supply

that powers the MIC5167 (PVIN) must be able to sink

current-to-ground; otherwise, the supply voltage will start

to increase. It is crucial that this external power supply

must also be able to source and sink current.

VDDQ

The VDDQ input on the MIC5167 is used to create the

internal reference voltage for VTT. The reference voltage

is generated from an internal resistor divider network of

two 60kΩ resistors, generating a reference voltage VREF

that is VDDQ/2. The VDDQ input should be Kelvin

connected as close as possible to the memory supply

voltage.

Since the reference is simply VDDQ/2, any perturbations

on VDDQ will also appear at half the amplitude on the

reference. For this reason, both ceramics and low-ESR

bulk capacitors such as OS-CON are recommended on

the VDDQ supply. This will aid in performance by

improving the source impedance over a wide frequency

range.

Feedback

The feedback (FB) pin provides the path for the error

amplifier to regulate VTT. The FB input must also be

Kelvin connected to the VTT bypass capacitors. If the FB

input is connected to close to the MIC5167, the IR drop

of the PCB trace can cause the VTT voltage at the

memory chip to be too low. Placing the MIC5167 as

close as possible to the DDR memory will improve the

load regulation performance.

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