ADP2302 datasheet(14/48 Pages) AD

14 / 48 page

AD5735

Data Sheet

Rev. B | Page 14 of 48

Pin No.

Mnemonic

Description

AVCC

Supply for DC-to-DC Circuitry. The voltage range is from 4.5 V to 5.5 V.

VBOOST_C

Supply for Channel C Current Output Stage (see Figure 71). This pin is also the supply for the VOUT_C stage,

which is regulated to 15 V by the dc-to-dc converter. To use the dc-to-dc converter, connect this pin as

shown in Figure 77.

IOUT_C

Current Output Pin for DAC Channel C.

COMPDCDC_C

DC-to-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the

feedback loop of the Channel C dc-to-dc converter. Alternatively, if using an external compensation resistor,

place a resistor in series with a capacitor to ground from this pin. For more information, see the DC-to-DC

Converter Compensation Capacitors section and the AICC Supply Requirements—Slewing section.

VOUT_C

Buffered Analog Output Voltage for DAC Channel C.

+VSENSE_C

Sense Connection for the Positive Voltage Output Load Connection for VOUT_C. The difference in voltage

between this pin and the VOUT_C pin is added directly to the headroom requirement.

−VSENSE_C

Sense Connection for the Negative Voltage Output Load Connection for VOUT_C. This pin must stay within

±3.0 V of AGND for specified operation.

COMPLV_C

Optional Compensation Capacitor Connection for VOUT_C Output Buffer. Connecting a 220 pF capacitor

between this pin and the VOUT_C pin allows the voltage output to drive up to 2 µF. Note that the addition

of this capacitor reduces the bandwidth of the output amplifier, increasing the settling time.

AVSS

Negative Analog Supply Pin. The voltage range is from −10.8 V to −26.4 V.

IOUT_D

Current Output Pin for DAC Channel D.

VOUT_D

Buffered Analog Output Voltage for DAC Channel D.

VBOOST_D

Supply for Channel D Current Output Stage (see Figure 71). This pin is also the supply for the VOUT_D stage,

which is regulated to 15 V by the dc-to-dc converter. To use the dc-to-dc converter, connect this pin as

shown in Figure 77.

COMPDCDC_D

DC-to-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the

feedback loop of the Channel D dc-to-dc converter. Alternatively, if using an external compensation resistor,

place a resistor in series with a capacitor to ground from this pin. For more information, see the DC-to-DC

Converter Compensation Capacitors section and the AICC Supply Requirements—Slewing section.

+VSENSE_D

Sense Connection for the Positive Voltage Output Load Connection for VOUT_D. The difference in voltage

between this pin and the VOUT_D pin is added directly to the headroom requirement.

−VSENSE_D

Sense Connection for the Negative Voltage Output Load Connection for VOUT_D. This pin must stay within

±3.0 V of AGND for specified operation.

COMPLV_D

Optional Compensation Capacitor Connection for VOUT_D Output Buffer. Connecting a 220 pF capacitor

between this pin and the VOUT_D pin allows the voltage output to drive up to 2 µF. Note that the addition

of this capacitor reduces the bandwidth of the output amplifier, increasing the settling time.

REFIN

External Reference Voltage Input.

REFOUT

Internal Reference Voltage Output. It is recommended that a 0.1 µF capacitor be placed between REFOUT

and REFGND.

RSET_D

An external, precision, low drift, 15 kΩ current setting resistor can be connected to this pin to improve the

IOUT_D temperature drift performance. For more information, see the External Current Setting Resistor section.

RSET_C

An external, precision, low drift, 15 kΩ current setting resistor can be connected to this pin to improve the

IOUT_C temperature drift performance. For more information, see the External Current Setting Resistor section.

EPAD

Exposed Pad. The exposed paddle should be connected to the potential of the AVSS pin, or, alternatively,

it can be left electrically unconnected. It is recommended that the paddle be thermally connected to a

copper plane for enhanced thermal performance.

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