GRAYCHIP, INC.

- 6 -

JUNE 22, 1998

GC3021 MIXER AND CARRIER REMOVAL CHIP

DATA SHEET

This document contains information which may be changed at any time without notice

be grounded if the internal terminators are not being used. TTL voltage levels can be used in the high speed

mode by setting the negative inputs to 1.5 volts so that the TTL input swing from 0.5 to 2.5 volts on the

positive inputs would toggle the differential receivers.

In the complex data input mode the HSI, HSI, HCK and HCK inputs are unused and the I and Q

pins are standard TTL inputs. The HSI, HSI, HCK and HCK pins and the VT pins should be grounded.

The data mux shown in Figure 2 outputs either the complex input data, the even/odd high speed

data or the diagnostic ramp from the sync counter circuit. The data mux output is sent to the mixer circuit.

2.5

MIXER

The mixer multiplies the pairs of samples from the input format circuit by sines and cosines and

outputs the results to the output format and the symbol offset circuits. A block diagram of the mixer circuit

is shown in Figure 5.

Figure 5. MIXER

The ACOS, BCOS, ASIN and BSIN values are generated by the NCO circuit. In the complex mode

BCOS will equal ACOS and BSIN will equal minus ASIN. In the high speed mode the ASIN and ACOS

values are the even time sine/cosine pairs and the BCOS and BSIN values are the odd time pairs. The lower

11 bits of the 23 bit multiplier products are either rounded off or truncated depending upon the state of the

are passed to the output format circuit.

The adders sum the individual products to generate complex products. The adder outputs are

saturated to 12 bits if the add causes overflow. The adder outputs pass through a gain circuit and then to

the symbol offset circuit. The gain circuit, if it is enabled, doubles the data values. The gain outputs are

1. When the fraction to be rounded is exactly 1/2, the round to even technique rounds up when the integer portion is odd and rounds

down when it is even. This removes any DC bias in the rounding.

12 Bits

DC_Q_OUT

XI

XQ

ACOS

BCOS

BSIN

ASIN

Round

Enable

(even)

(odd)

Adder

Clear

Add

2X Gain

SI

SQ

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

12 Bits

Symbol

Data To

Symbol Offset

Circuit

From

Input Format

Circuit

DC_I_IN

12 Bits

DC_Q_IN

DC_I_OUT