GRAYCHIP, INC.

- 10 -

JUNE 22, 1998

GC3021 MIXER AND CARRIER REMOVAL CHIP

DATA SHEET

This document contains information which may be changed at any time without notice

The dither circuit adds a random value to the upper 17 bits of the accumulator output. The random

number sequence is initialized to zero by the dither sync input. The dithering can be turned off by forcing

the sync to be active. The BSIN output is negated if the high speed mode is not enabled.

2.10

SNAPSHOT RAM

The snapshot RAM is used to store blocks of 64 mixer and NCO outputs. The mixer outputs are the

SI and SQ outputs shown in Figure 5. The NCO samples are the ACOS and ASIN values shown in Figure

5. The NCO samples are delayed to match the pipeline delay from the XI and XQ inputs to the SI and SQ

outputs. The snapshot can be programmed to store every sample, every other sample, every third sample,

or every fourth sample. The rate control is primarily used when capturing samples of offset-QPSK data

which is processed by the chip at twice the baud rate. Only every other sample of the offset-QPSK sample

is of interest.

The snapshot can be triggered by the input syncs, the delayed input syncs, the sync counter’s

terminal count or the snap sync input. Once triggered, the snapshot start time can be delayed by up to 256

sample clocks, where the sample clock rate is dependant upon the snapshot rate control.

The snapshot RAM is a read only memory which is read using addresses 256 through 511 of the

control interface. Addresses 256 through 319 read SI, addresses 320 through 383 read SQ, addresses 384

through 447 read ASIN, and addresses 448 through 511 read ACOS. The 12 bit values are sign extended

to 16 bits in the control interface.

2.11

OUTPUT FORMAT

The chip has four 12 bit output ports labeled YA, YB, YC, and YD. Each port can be individually

NCO samples are the snapshot RAM inputs (SI, SQ, sine, cosine). The output selection is shown in Table

1 below:

The YA, YB, YC and YD outputs can be rounded to 12, 10 or 8 bits and can be masked to a desired

number of bits through the use of four 12 bit mask words. The masks are bitwise ANDed with the output

words to selectively clear the output bits.

Output enable controls are provided to individually turn off these outputs.

Table 1: OUTPUT SELECTION

OUTPUT

PORT

OUTPUT SELECT

01

YA

SI

YB

SQ

YC

cosine

YD

sine