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WM8326 Datasheet(PDF) 239 Page - Wolfson Microelectronics plc |
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WM8326 Datasheet(HTML) 239 Page - Wolfson Microelectronics plc |
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239 / 255 page ![]() Production Data WM8326 w PD, June 2012, Rev 4.0 239 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 8 = DC-DC1 DVS Done 9 = DC-DC2 DVS Done 10 = External Power Enable1 11 = External Power Enable2 12 = System Supply Good (SYSOK) 13 = Converter Power Good (PWR_GOOD) 14 = External Power Clock (2MHz) 15 = Auxiliary Reset 2 XTAL_ENA 0 Crystal Oscillator Enable 0 = Disabled at all times 1 = Enabled in OFF, ON, SLEEP states (Note that the BACKUP behaviour is determined by XTAL_BKUPENA.) This field can only be written to by loading configuration settings from OTP/ICE. In all other cases, this field is Read Only. 1 XTAL_INH 0 Crystal Start-Up Inhibit 0 = Disabled 1 = Enabled When XTAL_INH=0, the internal RC oscillator will provide CLKOUT until the crystal oscillator is valid. When XTAL_INH=1, the ‘ON’ transition is inhibited until the crystal oscillator is valid. Register 781Ah GPIO1 OTP Control REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R30747 (781Bh) GPIO2 OTP Control 15 GP2_DIR 1 GPIO2 pin direction 0 = Output 1 = Input 14:13 GP2_PULL [1:0] 01 GPIO2 Pull-Up / Pull-Down configuration 00 = No pull resistor 01 = Pull-down enabled 10 = Pull-up enabled 11 = Reserved 12 GP2_INT_MOD E 0 GPIO2 Interrupt Mode 0 = GPIO interrupt is rising edge triggered (if GP2_POL=1) or falling edge triggered (if GP2_POL=0) 1 = GPIO interrupt is triggered on rising and falling edges 11 GP2_PWR_DO M 0 GPIO2 Power Domain select 0 = DBVDD 1 = PMICVDD (LDO12) 10 GP2_POL 1 GPIO2 Polarity select 0 = Inverted (active low) 1 = Non-Inverted (active high) 9 GP2_OD 0 GPIO2 Output pin configuration 0 = CMOS 1 = Open Drain 8 GP2_ENA 0 GPIO2 Enable control 0 = GPIO pin is tri-stated 1 = Normal operation |
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