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IR3553 Datasheet(PDF) 13 Page - International Rectifier |
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IR3553 Datasheet(HTML) 13 Page - International Rectifier |
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13 / 22 page ![]() November 29, 2012 | FINAL DATASHEET 13 IR3553 40A Integrated PowIRstage® THEORY OF OPERATION DESCRIPTION The IR3553 PowIRstage® is a synchronous buck driver with co‐packed MOSFETs with integrated Schottky diode, which provides system designers with ease of use and flexibility required in cutting edge CPU, GPU and DDR memory power delivery designs and other high‐current low‐profile applications. The IR3553 is designed to work with a PWM controller. It incorporates a continuously self‐calibrated current sense amplifier, optimized for use with inductor DCR sensing. The current sense amplifier provides signal gain and noise immunity, supplying multiphase systems with a superior design toolbox for programmed impedance designs. The IR3553 provides a phase fault signal capable of detecting open or shorted MOSFETs, or an over‐ temperature condition in the vicinity of the power stage. The IR3553 accepts an active low Body‐Braking® input which disables both MOSFETs to enhance transient performance or provide a high impedance output. The IR3553 provides diode emulation feature which avoids negative current in the synchronous MOSFET and improves light load efficiency. The IR3553 PWM input is compatible with 3.3V logic signal and 7V tolerant. It accepts 3‐level PWM input signals with tri‐state. PWM TRI‐STATE INPUT The IR3553 PWM accepts 3‐level input signals. When PWM input is high, the synchronous MOSFET is turned off and the control MOSFET is turned on. When PWM input is low, control MOSFET is turned off and synchronous MOSFET is turned on. Figures 16‐18 show the PWM input and the corresponding SW and GATEL output of the IR3553. If PWM pin is floated , the built‐in resistors pull the PWM pin into a tri‐state region centered around 1.65V. When PWM input is in tri‐state, two operation modes can be selected by controlling BBRK# input. If the BBRK# input is always high, the default operation mode is Body‐ Braking®, in which both MOSFETs will be turned off when the PWM input is in tri‐state. If the BBRK# input has been pulled low for at least 20ns after the VCC passes its UVLO threshold during power up, the diode emulation mode is set. PWM input in tri‐state will activate a synchronous diode emulation feature allowing designers to maximize system efficiency at light loads without compromising transient performance. BODY‐BRAKING® MODE International Rectifier’s Body‐Braking® is a operation mode in which two MOSFETs are turned off. When the synchronous MOSFET is off, the higher voltage across the Shottky diode in parallel helps discharging the inductor current faster, which reduces the output voltage overshoot. The Body‐Braking® can be used either to enhance transient response of the converter after load release or to provide a high impedance output. There are two ways to place the IR3553 in Body‐Braking® mode, either controlling the BBRK# pin directly or through a PWM tri‐state signal. Both control signals are usually from the PWM controller. Pulling BBRK# low forces the IR3553 into Body‐Braking® mode rapidly, which is usually used to enhance converter transient response after load release, as shown in Figure 19. Releasing BBRK# forces the IR3553 out of Body‐ Braking® mode quickly. The BBRK# low turns off both MOSFETs and therefore can also be used to disable/enable a converter. If the BBRK# input is always high, the Body‐Braking® is activated when the PWM input enters the tri‐state region, as shown in Figures 20 and 21. Comparing to pulling down the BBRK# pin directly, the Body‐Braking® response to PWM tri‐state signal is slower due to the hold‐off time created by the PWM pin parasitic capacitor with the pull‐ up and pull‐down resistors of PWM pin. For better performance, no more than 100pF parasitic capacitive load should be present on the PWM line of IR3553. SYNCHRONOUS DIODE EMULATION MODE An additional feature of the IR3553 is the synchronous diode emulation mode. This function enables increased efficiency by preventing negative inductor current from flowing in the synchronous MOSFET. As shown in Figure 22, when the PWM input enters the tri‐ state region the control MOSFET is turned off first, and the synchronous MOSFET is initially turned on and then is turned off when the output current reaches zero. If the sensed output current does not reach zero within a set amount of time the gate driver will assume that the output |
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