REV. B

AD1895

–21–

TDM MODE APPLICATION

In TDM Mode, several AD1895s can be daisy-chained together

and connected to the serial input port of a SHARC

AD1895 contains a 64-bit parallel load shift register. When the

LRCLK_O pulse arrives, each AD1895 parallel loads its left and

right data into the 64-bit shift register. The input to the shift

register is connected to TDM_IN, while the output is connected

to SDATA_O. By connecting the SDATA_O to the TDM_IN

of the next AD1895, a large shift register is created and is

clocked by SCLK_O.

The number of AD1895s that can be daisy-chained together is

limited by the maximum frequency of SCLK_O, which is about

up to eight AD1895s could be connected since 512

× f

than 25 MHz. In Master/TDM Mode, the number of AD1895s

that can be daisy-chained is fixed to four.

SHARC is a registered trademark of Analog Devices, Inc.

AD1895

TDM_IN

SDATA_O

LRCLK_O

M1

M2

M0

0

0

0

SCLK_O

SHARC

DSP

DR0

RFS0

RCLK0

SLAVE-2

SLAVE-n

STANDARD MODE

AD1895

TDM_IN

SDATA_O

LRCLK_O

M1

M2

M0

0

0

0

SCLK_O

AD1895

TDM_IN

SDATA_O

LRCLK_O

M1

M2

M0

SCLK_O

0

0

0

SCLK

LRCLK

SLAVE-1

Figure 11. Daisy-Chain Configuration for TDM Mode (All AD1895s Being Clock-Slaves)

AD1895

TDM_IN

SDATA_O

LRCLK_O

CLOCK-MASTER

M1

M2

M0

1

0

1

SCLK_O

SHARC

DSP

DR0

RFS0

RCLK0

SLAVE-1

SLAVE-n

STANDARD MODE

AD1895

TDM_IN

SDATA_O

LRCLK_O

M1

M2

M0

0

0

0

SCLK_O

AD1895

TDM_IN

SDATA_O

LRCLK_O

M1

M2

M0

SCLK_O

0

0

0

Figure 12. Daisy-Chain Configuration for TDM Mode (First AD1895 Being Clock-Master)