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ACT8937A Datasheet(PDF) 27 Page - Active-Semi, Inc |
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ACT8937A Datasheet(HTML) 27 Page - Active-Semi, Inc |
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27 / 45 page ![]() ACT8937A Rev 1, 22-Oct-12 Copyright © 2012 Active-Semi, Inc. Innovative Power TM ActivePMU TM and ActivePathTM are trademarks of Active-Semi. I 2CTM is a trademark of NXP. - 27 - www.active-semi.com The ACT8937A is optimized for use in applications using the S5PC100, S5PC110 and S5PV210 processors, supporting both the power domains as well as the signal interface for these processors. The following paragraphs describe how to design ACT8937A with S5PV210 Processor, but the design guidelines are directly applicable to S5PC100 and S5PC110 as well. While the ACT8937A supports many possible configurations for powering these processors, one of the most common configurations is detailed in this datasheet. In general, this document refers to the ACT8937A pin names and functions. However, in cases where the description of interconnections between these devices benefits by doing so, both the ACT8937A pin names and the Samsung processor pin names are provided. When this is done, the S5PV210 pin names are located after the ACT8937A pin names, and are italicized and located inside parentheses. For example, PWREN (XPWRRGTON) refers to the logic signal applied to the ACT8937A's PWREN input, identifying that it is driven from the S5PV210's XPWRRGTON output. Likewise, OUT1 (VDD_IO) refers to ACT8937A's OUT1 pin, identifying that it is connected to the S5PV210's VDD_IO power domain. SYSTEM CONTROL INFORMATION Interfacing with the Samsung S5PC100, S5PC110 and S5PV210 Processors Table 2: ACT8937A and Samsung S5PV210 Power Domains POWER DOMAIN ACT8937A CHANNEL TYPE DEFAULT VOLTAGE CURRENT CAPABILITY VDD_IO REG1 DC/DC 3.3V 1100mA VDD_INT REG2 DC/DC 1.1V/1.V 1100mA VDD_ARM REG3 DC/DC 1.25V/1.25V 1200mA VDD_xPLL REG4 LDO 1.1V 150mA VDD_Alive REG5 LDO 1.1V 150mA VDD_UOTG_D REG6 LDO 1.1V 250mA VDD_UOTG_A REG7 LDO 3.3V 250mA Table 3: ACT8937A and Samsung S5PV210 Power Modes POWER MODE CONTROL STATE POWER DOMAIN STATE QUIESCENT CURRENT ALL ON PWRHLD is asserted, PWREN is asserted REG1, REG2, REG3, REG4, REG5, REG6 and REG7 are all on 420µA NORMAL PWRHLD is asserted, PWREN is asserted, REG6 and REG7 are disabled after system boots up. REG1, REG2, REG3, REG4 and REG5 are on. REG6 and REG7 are off 340µA SLEEP PWRHLD is asserted, PWREN is de-asserted REG1 and REG5 are on. REG2, REG3, REG4, REG6 and REG7 are off 190µA ALL OFF PWRHLD is de-asserted, PWREN is de- asserted REG1, REG2, REG3, REG4, REG5, REG6 and REG7 are all off <18µA |
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