AD73422 datasheet(23/36 Pages) AD

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AD73422

–23–

Full Memory Mode Pins (Mode C = 0)

# of

Input/

Name(s)

Pins

Output Function

A13:0

Address Output Pins for Program,

Data, Byte and I/O Spaces

D23:0

I/O

Data I/O Pins for Program, Data,

Byte and I/O Spaces (8 MSBs are

also used as Byte Memory

addresses)

Host Mode Pins (Mode C = 1)

# of

Input/

Name(s)

Pins

Output Function

IAD15:0

I/O

IDMA Port Address/Data Bus

Address Pin for External I/O,

Program, Data or Byte Access

D23:8

I/O

Data I/O Pins for Program, Data

Byte and I/O Spaces

IWR

IDMA Write Enable

IRD

IDMA Read Enable

IAL

IDMA Address Latch Pin

IDMA Select

IACK

IDMA Port Acknowledge Configur-

able in Mode D; Open Source

NOTE

In Host Mode, external peripheral addresses can be decoded using the A0,

CMS, PMS, DMS and IOMS signals.

Terminating Unused Pin

The following table shows the recommendations for terminating

unused pins.

Pin Terminations

I/O

Hi-Z*

3-State

Reset

Caused

Unused

Name

(Z)

State

Configuration

XTAL

Float

CLKOUT

Float

A13:1 or

O (Z)

Hi-Z

BR, EBR

Float

IAD12:0

I/O (Z)

Hi-Z

Float

O (Z)

Hi-Z

BR, EBR

Float

D23:8

I/O (Z)

Hi-Z

BR, EBR

Float

D7 or

I/O (Z)

Hi-Z

BR, EBR

Float

IWR

High (Inactive)

D6 or

I/O (Z)

Hi-Z

BR, EBR

Float

IRD

BR, EBR

High (Inactive)

D5 or

I/O (Z)

Hi-Z

Float

IAL

Low (Inactive)

D4 or

I/O (Z)

Hi-Z

BR, EBR

Float

High (Inactive)

D3 or

I/O (Z)

Hi-Z

BR, EBR

Float

IACK

Float

D2:0 or

I/O (Z)

Hi-Z

BR, EBR

Float

IAD15:13

I/O (Z)

Hi-Z

Float

PMS

O (Z)

BR, EBR

Float

DMS

O (Z)

BR, EBR

Float

BMS

O (Z)

BR, EBR

Float

IOMS

O (Z)

BR, EBR

Float

Pin Terminations (Continued)

I/O

Hi-Z*

3-State

Reset

Caused

Unused

Name

(Z)

State

Configuration

CMS

O (Z)

BR, EBR

Float

O (Z)

BR, EBR

Float

O (Z)

BR, EBR

Float

High (Inactive)

O (Z)

Float

BGH

Float

IRQ2/PF7

I/O (Z)

Input = High (Inactive)

or Program as Output,

Set to 1, Let Float

IRQL1/PF6 I/O (Z)

Input = High (Inactive)

or Program as Output,

Set to 1, Let Float

IRQL0/PF5 I/O (Z)

Input = High (Inactive)

or Program as Output,

Set to 1, Let Float

IRQE/PF4

I/O (Z)

Input = High (Inactive)

or Program as Output,

Set to 1, Let Float

SCLK0

I/O

Input = High or Low,

Output = Float

RFS0

I/O

High or Low

DR0

High or Low

TFS0

I/O

High or Low

DT0

Float

SCLK1

I/O

Input = High or Low,

Output = Float

RFS1/IRQ0 I/O

High or Low

DR1/FI

High or Low

TFS1/IRQ1 I/O

High or Low

DT1/FO

Float

EBR

EBG

ERESET

EMS

EINT

ECLK

ELIN

ELOUT

NOTES

*Hi-Z = High Impedance.

1. If the CLKOUT pin is not used, turn it OFF.

2. If the Interrupt/Programmable Flag pins are not used, there are two options:

Option 1: When these pins are configured as INPUTS at reset and function

as interrupts and input flag pins, pull the pins High (inactive).

Option 2: Program the unused pins as OUTPUTS, set them to 1, and let

them float.

3. All bidirectional pins have three-stated outputs. When the pins is configured

as an output, the output is Hi-Z (high impedance) when inactive.

4. CLKIN, RESET, and PF3:0 are not included in the table because these pins

must be used.

Interrupts

The interrupt controller allows the processor to respond to the

eleven possible interrupts and RESET with minimum overhead.

The AD73422 provides four dedicated external interrupt

input pins, IRQ2, IRQL0, IRQL1 and IRQE. In addition,

SPORT1 may be reconfigured for IRQ0, IRQ1, FLAG_IN

and FLAG_OUT, for a total of six external interrupts. The

AD73422 also supports internal interrupts from the timer, the

byte DMA port, the two serial ports, software and the power-

down control circuit. The interrupt levels are internally priori-

tized and individually maskable (except power-down and reset).

AD73422 Datasheet(PDF) 23 Page - Analog Devices

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