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AD7398 Datasheet(PDF) 7 Page - Analog Devices

Part # AD7398
Description  Quad, Serial-Input 12-Bit/10-Bit DACs
PDF  16 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7398 Datasheet(HTML) 7 Page - Analog Devices

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REV. 0
AD7398/AD7399
–7–
TERMINOLOGY
Relative Accuracy, INL
For the DAC, relative accuracy or integral nonlinearity (INL) is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer function.
A typical INL versus code plot can be seen in TPC 1.
Differential Nonlinearity, DNL
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
± 1 LSB maxi-
mum ensures monotonicity. TPC 3 illustrates a typical DNL
versus code plot.
Zero-Scale Error, VZSE
Zero-scale error is a measure of the output voltage error from
zero voltage when zero code is loaded to the DAC register.
Full-Scale Error, VFSE
Full-scale error is a measure of the output voltage error from full-
scale voltage when full-scale code is loaded to the DAC register.
Full-Scale Temperature Coefficient, TCVFS
This is a measure of the change in full-scale error with a change
in temperature. It is expressed in ppm/
°C or mV/°C.
DAC Glitch Impulse, Q
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV-s
and is measured when the digital input code is changed by 1 LSB
at the major carry transition (midscale transition). A plot of the
glitch impulse is shown in TPC 10.
Digital Feedthrough, QDF
Digital feedthrough is a measure of the impulse injected into the
analog output of the DAC from the digital inputs of the DAC, but
is measured when the DAC output is not updated.
CS is held
high, while the CLK and SDI signals are toggled. It is speci-
fied in nV-s and is measured with a full-scale code change on
the data bus, i.e., from all 0s to all 1s and vice versa. A typi-
cal plot of digital feedthrough is shown in TPC 11.
Power Supply Sensitivity, PSS
This specification indicates how the output of the DAC is
affected by changes in the power supply voltage. Power supply
sensitivity is quoted in terms of % change in output per %
change in VDD for full-scale output of the DAC. VDD is varied
by
±10%.
Reference Feedthrough, VOUT/VREF
This is a measure of the feedthrough from the VREF input to
the DAC output when the DAC is loaded with all 0s. A 100 kHz,
1 V p-p is applied to VREF. Reference feedthrough is expressed
in dB or mV p-p.



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