AD9617

–9–

REV. B

The effective noise at the output of the amplifier can be deter-

mined by taking the root sum of the squares of Equation 11 and

applying the spectral noise values found in the typical graph

section. This applies to noise from the op amp only. Note that

both the noise figure and equivalent input offset voltages im-

CLI

In

400

500

CL

Figure 17. Capacitive Load Figure

Capacitive Load Considerations

design, the AD9617 can directly handle input and/or output

load capacitances of up to 20 pF. See the chart below.

A small series resistor can be used at the output of the amplifier

and outside of the feedback loop to facilitate driving larger ca-

pacitive loads or for obtaining faster settling time. For capacitive

INPUT CAPACITANCE – CLI

5pF

4pF/DIV

25pF

INPUT CAPACITANCE – CL

10pF

4pF/DIV

30pF

35

30

25

20

15

10

CL = 0pF

CLI = 0pF

Figure 18. Input/Output Capacitance Comparisons

CL – pF

25

0

20

15

10

5

0

20

40

60

80

100

APPLYING THE AD9617

The superior frequency and time domain specifications of the

AD9617 make it an obvious choice for driving flash converters

and buffering the outputs of high speed DACs. Its outstanding

distortion and noise performance make it well suited as a driver

for analog to digital converters (ADCs) with resolutions as high

as 16 bits.

Typical circuits for inverting and noninverting applications are

shown in Figures 20 and 21.

Closed-loop gain for noninverting configurations is determined

by the value of RI according to the equation:

G

= 1 +

(12)

0.1 F

0.1 F

0.1 F

0.1 F

3.3 F

3.3 F

AD9617

400

Figure 20. Noninverting Operation

0.1 F

0.1 F

0.1 F

0.1 F

3.3 F

3.3 F

AD9617

400

Figure 21. Inverting Operation