REV. 0

AD9870

–6–

Address Bit

(Hex)

Breakdown

Width

Default Value

Name

Description

CLOCK SYNTHESIZER (Continued)

0x13

(7:0)

8

0x3C

CKN(7:0)

Synthesized Frequency Divisor (8 LSBs of a 13-Bit Word).

Min = 3, Max = 8191.

0x14

(6)

1

0

CKF

Enable Fast Acquire.

(5)

1

0

CKINV

Invert Charge Pump (0 = Pump_Up

⇒ IOUTC Sources Current).

(4:2)

3

0

CKI

× 0.625 mA.

(1:0)

2

0

CKTM

Manual Control of CLK Charge Pump (0 = Off, 1 = Down, 2 = Up, 3 = Normal).

0x15

(3:0)

4

0x0

CKFA(13:8)

CK Fast Acquire Time Unit (4 MSBs of a 14-Bit Word).

0x16

(7:0)

8

0x04

CKFA(7:0)

CK Fast Acquire Time Unit (8 LSBs of a 14-Bit Word).

SSI CONTROL

0x18

(7:0)

8

0x12

SSICRA

SSI Control Register A. See Table III.

(Default is FS and CLKOUT Three-Stated.)

0x19

(1:0)

2

0x0

SSICRB

SSI Control Register B. See Table III.

0x1A

(3:0)

4

1

SSIORD

AAF CAPACITOR SETTING/CALIBRATION

0x1C

(7:0)

8

0x00

AAR

Antialias Response Selector. 0x60 Is Recommended.

0x1D

5

1

0

ERRN

Error Flag.

(4:0)

5

0x0

CAPN

AAF N-Well Capacitor Setting.

0x1E

5

1

0

ERRP

Error Flag.

(4:0)

15

0x0

CAPP

AAF Poly-Poly Capacitor Setting.

TEST REGISTERS AND SPI PORT READ ENABLE

0x38

(7:0)

8

0x00

TEST

Factory Test Mode.

0x39

0

1

0

TEST

Factory Test Mode.

0x3A

(7:4, 2:0)

7

0x0

TEST

Factory Test Mode.

(3)

1

0

SPIREN

Enable Read from SPI Port.

0x3B–

(7:0)

1

0x00

TEST

Factory Test Mode.

0x3F