CT2555 datasheet(31/36 Pages) AEROFLEX

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SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700

Table 7A – CT2553 Pin Function Table (78 Pin DIP)

Name

IIH(µA) IIL(mA) IOH(µA) IOL(mA)

Description

D00

(5)

-0.4

-400

3.6

I/O Data Bus Bit 0 (LSB).

D02

(5)

-0.4

-400

3.6

I/O Data Bus Bit 2.

D04

(5)

-0.4

-400

3.6

I/O Data Bus Bit 4.

D06

(5)

-0.4

-400

3.6

I/O Data Bus Bit 6.

D08

(5)

-0.4

-400

3.6

I/O Data Bus Bit 8.

D10

(5)

-0.4

-400

3.6

I/O Data Bus Bit 10.

D12

(5)

-0.4

-400

3.6

I/O Data Bus Bit 12.

D14

(5)

-0.4

-400

3.6

I/O Data Bus Bit 14.

RTAD1

(5)

-0.4

Remote Terminal Address Bit 1.

RTAD0

(5)

-0.4

Remote Terminal Address Bit 0 (LSB)

RTAD4

(5)

-0.4

Remote Terminal Address Bit 4 (MSB)

ILLCMD

+10

±0.01

Legal Command. Defines the received command as illegal.

SA/MC-0

-400

2.0

Subaddress/Mode Command Bit 0. Multiplexed output bit-0 of

subaddress/word count field of the current command word. SA/MC

determined by the state of LMC.

Logic +5V

+5V supply input for digital logic section. B6 counter.

SA/MC-1

-400

2.0

Subaddress/Mode Command Bit 1. In MT mode, pulses every time 32

words have been stored. B7 counter.

BCSTRCV

-400

2.0

Broadcast Received. Indicates current command is a 1553 Broadcast

Command.

LMC

-400

2.0

Latched Mode Command. Logic 1 indicates current command word is a

mode code and selects MC0-MC4. Logic 0 indicates non-mode

comrnand and selects SA0-SA4.

-15V

-15V input power supply connection for the B channel transceiver.

GNDB

Ground B. Power supply return connection for the B channel

transceiver.

TX/RX-B

Transmit/Receive transceiver-B. Input/output to the coupling

transformer that connects to the B channel of the 1553 Bus.

Logic GND

Logic Ground. Power supply return for the digital logic section.

A01

(5)

-0.4

-400

3.6

Address Bit 1

A03

(5)

-0.4

-400

3.6

Address Bit 3

A05

(5)

-0.4

-400

3.6

Address Bit 5

A07

(5)

-0.4

-400

3.6

Address Bit 7

A09

(5)

-0.4

-400

3.6

Address Bit 9

A11

(5)

-0.4

-400

3.6

Address Bit 11

A13

(5)

-0.4

-400

3.6

Address Bit 13

A15

(5)

-0.4

-400

3.6

Address Bit 15 (MSB)

MEMOE

-400

4.0

Memory Output Enable. A Logic 0 used to enable data output

from memory when the 1553 or CPU reads from memory.

MEMENA-OUT

-400

4.0

Memory Enable Out. Low level output to enable external RAM.

Used with MEMOE to read data or with MEMWR to write data into

external RAM.

CLOCK IN

±20

±0.02

Clock Input. 16 MHz TTL clock.

MEM/REG

(6)

-0.7

Memory/Register. Input from CPU to select memory or register data

transfer.

STRBD

(6)

-0.7

Strobe Data. Used in conjunction with SELECT to initiate a data

transfer cycle to/from CPU.

EXTEN

External Enable. Used to load data into external devices.

RD/WR

(6)

-0.7

Read/Write. Input from the CPU which defines the Data Bus

transfer as a read or write operation.

EXTLD

External load. Used to load data into external devices.

GNDA

Ground A. Power supply return connection for the A channel

transceiver.

-15VA

-I5V input power supply connection for the A channel transceiver.

TX/RX-A

Transmit/Receive transceiver-A. Input/Output to the coupling

transformer that connects to the A channel of the 1553 Bus.

D01

(5)

-0.4

-400

3.6

I/O Data Bus Bit 1.

D03

(5)

-0.4

-400

3.6

I/O Data Bus Bit 3.

D05

(5)

-0.4

-400

3.6

I/O Data Bus Bit 5

D07

(5)

-0.4

-400

3.6

I/O Data Bus Bit 7.

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