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T7630 Datasheet(PDF) 20 Page - Agere Systems |
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T7630 Datasheet(HTML) 20 Page - Agere Systems |
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20 / 210 page ![]() Preliminary Data Sheet T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator II) October 2000 20 Lucent Technologies Inc. Lucent Technologies Inc. Pin Information (continued) Table 1. Pin Descriptions-Channel 1 and Channel 2 (continued) * Iu indicates an internal pull-up. † After RESET is deasserted, the channel is in the default framing mode, as a function of the DS1/CEPT pin. ‡ Asserting this pin low will initially force RDY to a low state. Pin Symbol Type* Description CH1 CH2 11 27 RTIP_RPD I Receive Bipolar Tip. Positive bipolar input data from the receive analog line isolation transformer. Receive Positive Rail Data. Valid when the FRAMER pin is strapped to 0 V. NRZ serial data latched by the rising edge of RLCK. Data rates: DS1-1.544 Mbits/s; CEPT-2.048 Mbits/s. Optional single-rail NRZ receive data latched by the rising edge of RLCK. 13 25 VDDA P Analog 5 V Power Supply. 5 V ± 5%. 14, 18 20, 24 GRNDX P Transmit Line Driver Ground Reference. 15 23 TRING O Transmit Bipolar Ring. Negative bipolar output data to the transmit analog isolation transformer. 16 22 VDDXP Transmit Line Driver 5 V Power Supply. 5 V ± 5%. 17 21 TTIP O Transmit Bipolar Tip. Positive bipolar output data to the transmit analog isolation transformer. 37, 72, 108, 144 VDD P 5 V Power Supply. 5 V ± 5%. 143 39 LOPLLCK O Loss of PLLCK Clock. This pin is asserted high when the PLLCK clock does not toggle for a 250 µs interval. This pin is deasserted 250 µs after PLLCK clock restarts toggling. 142 40 DS1/CEPT Iu DS1/CEPT. Strap to VDD to enable defaults for DS1 operation. Strap to VSS to enable defaults for CEPT operation. 141 41 FRAMER Iu Framer Mode. Strap to VDD to enable integrated LIU and framer operation. Strap to VSS to bypass the LIU section; the receive framer is sourced directly from the RPD, RND, and RLCK pins while the TPD, TND, and TLCK pins are driven by the transmit framer. 140 42 3-STATE Iu 3-State (Active-Low). Asserting this pin low forces the channel outputs into a high-impedance state. Asserting both 3-state pins low forces all outputs into a high-impedance state. 139 43 RESET† Iu Reset (Active-Low). Asserting this pin low resets the channel. Asserting both RESET pins low resets the entire device including the global registers. 138 44 TPD O Transmit Line Interface Positive-Rail Data. This signal is the transmit framer positive NRZ output data. Data changes on the rising edge of TLCK. In the single-rail mode, TPD = transmit framer data. |
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