MAX2021

High-Dynamic-Range, Direct Up-/Downconversion

650MHz to 1200MHz Quadrature Mod/Demod

16

Maxim Integrated

LO FREQ

(MHz)

RF FREQ

(MHz)

R1

(Ω

Ω

Ω

Ω)

R2

(Ω

Ω

Ω

Ω)

R3

(Ω

Ω

Ω

Ω)

(mA)

OIP3

(dBm)

LO LEAK

(dBm)

IMAGE REJ

(dBc)

OIP2

(dBm)

420

620

330

271

19.6

-32.1

23.9

50.5

453

665

360

253

21.9

-32.7

34.0

51.0

499

698

402

229

18.9

-33.7

30.0

52.6

549

806

464

205

15.7

-34.4

23.7

46.0

800

801.8

650

1000

550

173

13.6

-34.2

23.3

32.3

420

620

330

271

20.7

-31.4

43.4

54.0

453

665

360

253

21.6

-31.6

42.4

55.4

499

698

402

229

20.6

-31.8

42.7

59.8

549

806

464

205

19.0

-31.9

40.3

50.7

900

901.8

650

1000

550

173

14.9

-30.5

25.0

34.6

420

620

330

271

22.4

-32.8

39.3

55.5

453

665

360

253

22.2

-33.2

39.1

56.3

499

698

402

229

19.9

-33.8

43.5

55.0

549

806

464

205

17.6

-34.8

40.5

51.4

1000

1001.8

650

1000

550

173

14.6

-33.9

36.8

32.8

Table 1. Typical Performance Trade-Offs as a Function of Current Draw—Modulator Mode

Power-Supply Bypassing

Proper voltage-supply bypassing is essential for high-

frequency circuit stability. Bypass all VCC_ pins with

33pF and 0.1µF capacitors placed as close to the pins

as possible. The smallest capacitor should be placed

closest to the device.

To achieve optimum performance, use good voltage-

supply layout techniques. The MAX2021 has several

RF processing stages that use the various VCC_

pins, and while they have on-chip decoupling, off-

chip interaction between them may degrade gain, lin-

earity, carrier suppression, and output power-control

range. Excessive coupling between stages may

degrade stability.

Exposed Pad RF/Thermal Considerations

The EP of the MAX2021’s 36-pin TQFN-EP package

provides a low thermal-resistance path to the die. It is

important that the PCB on which the IC is mounted be

designed to conduct heat from this contact. In addition,

the EP provides a low-inductance RF ground path for

the device.

The exposed pad (EP) MUST be soldered to a ground

plane on the PCB either directly or through an array of

plated via holes. An array of 9 vias, in a 3 x 3 array, is

suggested. Soldering the pad to ground is critical for

efficient heat transfer. Use a solid ground plane wher-

ever possible.