MGC3130 datasheet(14/40 Pages) MICROCHIP

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MGC3130

DS41667A-page 14

Advance Information

 2012 Microchip Technology Inc.

4.2.2

POWER SUPERVISORS

During the Power-up sequence, the system Reset will

remain low until the VDD reaches the 1.5V level and

the Reset delay, tRSTDLY, has been elapsed (typically

200 us).

The system start depends on the target application (if

the STEP-UP will be used or not) and on the used VDD

voltage.

STEP-UP applications (2.5V  VDD < 3.3V): The

system starts after Power-up/Time-out period (tPWRT)

if the 2.5V is already reached.

The STEP-UP converter starts automatically from

2.5V if the external STEP-UP components are

assembled. It stays activated until a 3.5V VDD voltage

level is reached.

For VDD input beyond this level, the STEP-UP

converter will automatically stop operating and the

GestIC Library can disable it. For more details, please

refer to Figure 4-4.

Standard applications (without STEP-UP) (3.3V  VDD

 3.6V): The system starts after Power-up/Time-out

period (tPWRT) if the 3.3V is already reached.

FIGURE 4-4:

POWER SUPERVISORS

MCLR

STEP-UP

1.5V

VSTEP-UP

VDD

Hysteresis

t1 t2

2.5V

time

3.5V

3.3V

t1: tRSTDLY: Reset delay 120 µs, typically 200 µs

t2: tPWRT: Power-Up Time-out

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