DDC101 datasheet(13/29 Pages) TI

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DDC101

input range, an input current of 0.5

µA integrated for 1ms

will result in the full scale charge of 500pC. For voltage

inputs, the input resistor is chosen to achieve the proper full

scale input current. As an example, for a 5V full scale input,

a 10M

Ω input resistor is selected to achieve a full scale input

current of 0.5

µA (1ms integration time).

Noise of 1.6ppm of FSR is equal to 1.6ppm x 500pC = 0.8fC

or 1.6ppm x 0.5

µA = 0.8pA or 1.6ppm x 5V = 8µV. Thus,

in this instance, noise is 1.6pA or 8

µV.

For the unipolar input range, the following table shows the

full scale input current required for different integration

times to collect 500pC of charge and the equivalent current

values for 2 and 5ppm of FSR.

CURRENT INPUT

The maximum average input current that can be captured by

the DDC101 is

±7.8µA. This current will result in an

integration time of 64

µs for unipolar input range and 32µs

for bipolar input range. For longer integration times, the

average input current must be less.

The maximum input current is limited by the slew and

update rate of the internal tracking logic and CDAC. The

largest input current that the DDC101 can accurately track is

7.8

µA. Input currents larger than 7.8µA and high speed

current input pulses can be accurately captured and digitized

by the DDC101 with an external input or sensor capacitance

on the DDC101 input. The average current during a com-

plete integration cycle cannot exceed 7.8

µA. Likewise, the

total charge input must not exceed 500pC unipolar, 250pC

bipolar during the integration time.

An external user provided input capacitance, C

S, as shown in

Figure 9a, will capture the input signal charge if the input

current limit is temporarily exceeded during the integration

cycle. The DDC101 will then transfer the charge completely

to C

INT based upon conservation of charge. An additional

FIGURE 9a. Current Pulse Input Capture.

TABLE I. Integration Time (T

INT) and Full Scale Current (IFS)

for Full Scale 500pC Integration.

INT

2ppm

5ppm

50ms

10nA

0.02pA

0.5pA

5ms

100nA

0.2pA

1pA

1ms

500nA

1pA

2.5pA

500

µs1µA

2pA

5pA

100

µs5µA

10pA

25pA

DDC101

Voltage across input must not exceed ±2.5V.

Analog Input, pin 3

Analog Common

External user provided capacitance, C

SOURCE, to store current pulses.

SECTION 5

DISCUSSION OF

SPECIFICATIONS

INPUT

The DDC101 is a charge digitizing A/D converter. Low

level current output sources, such as a photosensors, can be

directly connected to its input. The input signal can also be

a voltage connected through a user selected resistor.

CHARGE INPUT

The maximum charge that can be captured in one integration

by the DDC101 is 500pC. In the unipolar input range mode,

the maximum positive charge that can be collected in one

integration is 500pC. The DDC101 has a small negative

range in the unipolar mode of –1.95pC. This small negative

underrange is included to allow for a small amount of

leakage current from the user’s PC board and sensor. In the

bipolar input range, the maximum positive charge that can

be collected is +250pC. The maximum negative charge that

can be collected is –251.95pC.

In addition to the normal mode of one integration per

conversion, DDC101 can be configured by the user for 1 to

256 integrations per conversion. When the multiple integra-

tions per conversion mode is chosen, the DDC101 DSP

circuitry internally averages multiple integration cycles to

provide one conversion result. This result has lower noise

because it is the average of multiple integrations. In this

mode, the maximum total charge that can be captured by the

DDC101 in 256 integrations is 128,000pC.

TEST CURRENT INPUT

An internal DC test current can be connected under user

control to the DDC101’s input. The test current is nominally

100nA and will be summed with any applied external input

signal. It is derived by a resistive network from the positive

power supply. The test current is intended to test for func-

tionality only. The TEST In pin of the DDC101 controls the

current. When TEST is HIGH, the internal current source is

ON and current is flowing into the DDC101 input. When

TEST is LOW, the current source is disconnected from the

input. With TEST active, positive power supply current

increases by approximately 1mA.

FULL SCALE RANGE

The full scale range (FSR), which is referenced in the

specification table, is the difference between the positive full

scale charge and the negative full scale charge for the

DDC101 in one integration cycle. Specifications such as

noise and linearity, which are specified in percent or ppm of

FSR, are referring to a value of 500pC for both unipolar and

bipolar input ranges.

The full scale input current for a given integration time will

result in a full scale input charge. As an example for unipolar

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