M68HC08 datasheet(180/332 Pages) FREESCALE

180 / 332 page

Universal Serial Bus Module (USB)

Technical Data

MC68HC908JB16 — Rev. 1.1

180

Universal Serial Bus Module (USB)

Freescale Semiconductor

Figure 11-13. Data Jitter

For low-speed transmissions, the jitter time for any consecutive

differential data transitions must be within

±25ns and within ±10ns for

any set of paired differential data transitions. These jitter numbers

include timing variations due to differential buffer delay, rise/fall time

mismatches, internal clock source jitter, noise and other random effects.

11.7.2.5 Data Signal Rise and Fall Time

The output rise time and fall time are measured between 10% and 90%

of the signal. Edge transition time for the rising and falling edges of low-

speed signals is 75ns (minimum) into a capacitive load (CL) of 200pF

and 300ns (maximum) into a capacitive load of 600pF. The rising and

falling edges should be transitioning (monotonic) smoothly when driving

the cable to avoid excessive EMI.

Figure 11-14. Data Signal Rise and Fall Time

CONSECUTIVE

TRANSITIONS

tPeriod

DIFFERENTIAL

DATA LINES

CROSSOVER

POINTS

PAIRED

TRANSITIONS

JITTER

DIFFERENTIAL

DATA LINES

RISE TIME

FALL TIME

10%

90%

10%

LOW SPEED: 75ns at CL = 200pF, 300ns at CL = 600 pF

M68HC08 Datasheet(PDF) 180 Page - Freescale Semiconductor, Inc