M68HC08 datasheet(183/332 Pages) FREESCALE

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Universal Serial Bus Module (USB)

MC68HC908JB16 — Rev. 1.1

Technical Data

Freescale Semiconductor

Universal Serial Bus Module (USB)

183

11.8.2 USB Interrupt Register 0

EOPIE — End-of-Packet Detect Interrupt Enable

This read/write bit enables the USB to generate CPU interrupt

requests when the EOPF bit becomes set. Reset clears the EOPIE

bit.

1 = End-of-packet sequence detection can generate a CPU

interrupt request

0 = End-of-packet sequence detection cannot generate a CPU

interrupt request

SUSPND — USB Suspend Bit

To save power, this read/write bit should be set by the software if a

3ms constant idle state is detected on the USB bus. Setting this bit

puts the transceiver into a power-saving mode. The RESUMF flag

must be cleared before setting SUSPND. Software must clear this bit

after the resume flag (RESUMF) is set while this resume interrupt flag

is serviced.

TXD2IE — Endpoint 2 Transmit Interrupt Enable

This read/write bit enables the transmit endpoint 2 to generate CPU

interrupt requests when the TXD2F bit becomes set. Reset clears the

TXD2IE bit.

1 = Transmit endpoint 2 can generate a CPU interrupt request

0 = Transmit endpoint 2 cannot generate a CPU interrupt request

Address:

$0039

Bit 7

654321

Bit 0

Read:

EOPIE

SUSPND

TXD2IE

RXD2IE

TXD1IE

TXD0IE

RXD0IE

Write:

Reset:

00000000

= Unimplemented

Figure 11-16. USB Interrupt Register 0 (UIR0)

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